Jean-Philippe Diguet received the M.S. degree and the Ph.D. degree from Rennes University (France), in 1993 and 1996, respectively. His thesis, within the LASTI laboratory (IRISA/R2D2) addressed the estimation of hardware complexity and algorithmic transformations for high level synthesis. Then he joined the IMEC in Leuven, where he worked as a postdoctoral fellow on memory hierarchy decisions for power optimization. He has been a Member of the LESTER laboratory (Lorient, France) since 1998, where he started research project in design space exploration at both algorithmic and system levels. He has been an Associated Professor at UBS University (France) from 1998 until 2002. In 2003, he initiated a technology transfer and cofunded the Dixip Company in the domain of wireless embedded systems. Since 2004 he has been a CNRS Researcher. His current work focuses firstly on managing the EDA framework project design trotter for design space exploration in the domain of heterogeneous real-time embedded systems. The second topic is the definition of environmentaware and self-adaptive architectures under QoS and power constraints, it includes RTOS new services, security concerns, NOC, and architecture reconfiguration control.
Biography Updated on 5 August 2006