Mark Zwolinski

Personal Home Page

http://www.ecs.soton.ac.uk/people/mz

Articles in Scholarly Journals [Incomplete List]

  1. Using neural networks as a fault detection mechanism in MEMS devices
    Microelectronics and Reliability, vol. 47, no. 1, pp. 142–149, 2007
  2. Analogue electronic circuit diagnosis based on ANNs
    Microelectronics and Reliability, 2006
  3. On the Design of Self-Checking Controllers with Datapath Interactions
    IEEE Transactions on Computers, vol. 55, no. 11, pp. 1423–1434, 2006
  4. An Integrated High-Level On-Line Test Synthesis Tool
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 11, pp. 2479–2491, 2006
  5. Behavioral Fault Modeling and Simulation Using VHDL-AMS to Speed-Up Analog Fault Simulation
    Analog Integrated Circuits and Signal Processing, vol. 39, no. 2, pp. 177–190, 2004
  6. Behavioural synthesis utilising dynamic memory constructs
    IEE Proceedings - Computers and Digital Techniques, vol. 151, no. 3, p. 252, 2004
  7. Concurrent analogue fault simulation, the equation formulation aspect
    International Journal of Circuit Theory and Applications, vol. 32, no. 6, pp. 487–507, 2004
  8. Generation and Verification of Tests for Analog Circuits Subject to Process Parameter Deviations
    Journal of Electronic Testing, vol. 20, no. 1, pp. 11–23, 2004
  9. Integrating testability with design space exploration
    Microelectronics Reliability, vol. 43, no. 5, pp. 685–693, 2003
  10. Analysis of mirror mismatch and clock-feedthrough in Bruton transformation switched current wave filters
    IEE Proceedings - Circuits, Devices and Systems, vol. 150, no. 1, p. 6, 2003
  11. Globally convergent algorithms for dc operating point analysis of nonlinear circuits
    IEEE Transactions on Evolutionary Computation, vol. 7, no. 1, pp. 2–10, 2003
  12. A technique for transparent fault injection and simulation in VHDL
    Microelectronics Reliability, vol. 41, no. 6, pp. 797–804, 2001
  13. Mutual information theory for adaptive mixture models
    IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 23, no. 4, pp. 396–403, 2001
  14. Applying a robust heteroscedastic probabilistic neural network to analog fault detection and classification
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 19, no. 1, pp. 142–151, 2000
  15. Applying mutual information theory to behavioural analogue fault modelling
    International Journal of Electronics, vol. 87, no. 12, pp. 1461–1471, 2000
  16. Simultaneous optimisation of dynamic power, area and delay in behavioural synthesis
    IEE Proceedings - Computers and Digital Techniques, vol. 147, no. 6, p. 383, 2000
  17. In-line test of synthesised systems exploiting latency analysis
    IEE Proceedings - Computers and Digital Techniques, vol. 147, no. 1, p. 33, 2000
  18. Using robust adaptive mixing for statistical fault macromodelling
    IEE Proceedings - Circuits, Devices and Systems, vol. 147, no. 5, p. 265, 2000
  19. Simulation of losses in resonant converter circuits
    International Journal of Electronics, vol. 86, no. 6, pp. 763–783, 1999
  20. Analog Integrated Circuits and Signal Processing, vol. 16, no. 2, pp. 141–155, 1998
  21. Bootstrap, an alternative to Monte Carlo simulation
    Electronics Letters, vol. 34, no. 12, p. 1174, 1998
  22. Design for test technique for increasing the resolution of supply current monitoring in analogue circuits
    Electronics Letters, vol. 33, no. 21, p. 1746, 1997
  23. Issues in the design of a logic simulator: element modelling for efficiency
    IEE Proceedings - Circuits, Devices and Systems, vol. 143, no. 1, p. 21, 1996
  24. Issues in the design of a logic simulator: an improved caching technique for event-queue management
    IEE Proceedings - Circuits, Devices and Systems, vol. 142, no. 5, p. 293, 1995
  25. Anatomy of a simulation backplane
    IEE Proceedings - Computers and Digital Techniques, vol. 142, no. 6, p. 377, 1995
  26. Macromodel of CMOS operational amplifier including supply current variation
    Electronics Letters, vol. 31, no. 17, p. 1398, 1995
  27. Overview of SPICE-like circuit simulation algorithms
    IEE Proceedings - Circuits, Devices and Systems, vol. 141, no. 4, p. 242, 1994
  28. Confidence in mixed-mode circuit simulation
    Computer-Aided Design, vol. 24, no. 2, pp. 115–118, 1992
  29. Lee router modified for global routing
    Computer-Aided Design, vol. 22, no. 5, pp. 296–300, 1990