Israel Koren

Personal Home Page

http://www.ecs.umass.edu/ece/dept/people/faculty/koren.html

Articles in Scholarly Journals [Incomplete List]

  1. IEEE Transactions on Parallel and Distributed Systems, vol. 18, no. 11, pp. 1539–1550, 2007
  2. IEEE Transactions on Computers, vol. 55, no. 9, pp. 1073–1074, 2006
  3. A self-correcting active pixel sensor using hardware and software correction
    IEEE Design and Test of Computers, vol. 21, no. 6, pp. 544–551, 2004
  4. Fault-sensitivity analysis and reliability enhancement of analog-to-digital converters
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 11, no. 5, pp. 839–852, 2003
  5. System-level power-aware design techniques in real-time systems
    Proceedings of the IEEE, vol. 91, no. 7, pp. 1055–1069, 2003
  6. Error analysis and detection procedures for a hardware implementation of the advanced encryption standard
    IEEE Transactions on Computers, vol. 52, no. 4, pp. 492–505, 2003
  7. Analog Integrated Circuits and Signal Processing, vol. 35, no. 2/3, pp. 189–197, 2003
  8. Filtering random graphs to synthesize interconnection networks with multiple objectives
    IEEE Transactions on Parallel and Distributed Systems, vol. 13, no. 11, pp. 1139–1149, 2002
  9. Phantom redundancy: a register transfer level technique for gracefully degradable data path synthesis
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 21, no. 8, pp. 877–888, 2002
  10. Importance Sampling to Evaluate Real-time System Reliability: A Case Study
    SIMULATION, vol. 76, no. 3, pp. 172–182, 2001
  11. Constant-time addition and simultaneous format conversion based on redundant binary representations
    IEEE Transactions on Computers, vol. 50, no. 11, pp. 1267–1278, 2001
  12. Incorporating yield enhancement into the floorplanning process
    IEEE Transactions on Computers, vol. 49, no. 6, pp. 532–541, 2000
  13. The Journal of Supercomputing, vol. 16, no. 1/2, pp. 53–68, 2000
  14. STATS: A framework for microprocessor and system-level design space exploration
    Journal of Systems Architecture, vol. 45, no. 12-13, pp. 1097–1110, 1999
  15. Defect tolerance in VLSI circuits: techniques and yield analysis
    Proceedings of the IEEE, vol. 86, no. 9, pp. 1819–1838, 1998
  16. An interactive VLSI CAD tool for yield estimation
    IEEE Transactions on Semiconductor Manufacturing, vol. 8, no. 2, pp. 130–138, 1995
  17. Complete and partial fault tolerance of feedforward neural nets
    IEEE Transactions on Neural Networks, vol. 6, no. 2, pp. 446–456, 1995
  18. Layout-synthesis techniques for yield enhancement
    IEEE Transactions on Semiconductor Manufacturing, vol. 8, no. 2, pp. 178–187, 1995
  19. A statistical study of defect maps of large area VLSI IC's
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 2, no. 2, pp. 249–256, 1994
  20. The Hyeti defect tolerant microprocessor: a practical experiment and its cost-effectiveness analysis
    IEEE Transactions on Computers, vol. 43, no. 12, pp. 1398–1406, 1994
  21. Hybrid signed-digit number systems: a unified framework for redundant number representations with bounded carry propagation chains
    IEEE Transactions on Computers, vol. 43, no. 8, pp. 880–891, 1994
  22. Generalized multistate monotone coherent systems
    IEEE Transactions on Reliability, vol. 43, no. 2, pp. 242–250, 1994
  23. Connectivity and performance tradeoffs in the cascade correlation learning architecture
    IEEE Transactions on Neural Networks, vol. 5, no. 6, pp. 930–935, 1994
  24. A unified negative-binomial distribution for yield analysis of defect-tolerant circuits
    IEEE Transactions on Computers, vol. 42, no. 6, pp. 724–734, 1993
  25. On paths with the shortest average arc length in weighted graphs
    Discrete Applied Mathematics, vol. 45, no. 2, pp. 169–179, 1993
  26. Balanced block spacing for VLSI layout
    Discrete Applied Mathematics, vol. 40, no. 3, pp. 303–318, 1992
  27. Estimating the potential parallelism and pipelining of algorithms for data flow machines
    Journal of Parallel and Distributed Computing, vol. 14, no. 1, pp. 15–28, 1992
  28. A random, distributed algorithm to embed trees in partially faulty processor arrays
    Journal of Parallel and Distributed Computing, vol. 12, no. 1, pp. 1–11, 1991
  29. Evaluating elementary functions in a numerical coprocessor based on rational approximations
    IEEE Transactions on Computers, vol. 39, no. 8, pp. 1030–1037, 1990
  30. Fault tolerance in VLSI circuits
    Computer, vol. 23, no. 7, pp. 73–83, 1990
  31. On gracefully degrading multiprocessors with multistage interconnection networks
    IEEE Transactions on Reliability, vol. 38, no. 1, pp. 82–89, 1989
  32. Optimal aspect ratios of building blocks in VLSI
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 8, no. 2, pp. 139–145, 1989
  33. Floorplans, planar graphs, and layouts
    IEEE Transactions on Circuits and Systems, vol. 35, no. 3, pp. 267–278, 1988
  34. A data-driven VLSI array for arbitrary algorithms
    Computer, vol. 21, no. 10, pp. 30–43, 1988
  35. Designing interconnection buses in VLSI and WSI for maximum yield and minimum delay
    IEEE Journal of Solid-State Circuits, vol. 23, no. 3, pp. 859–866, 1988
  36. Analysis of strategies for constructive general block placement
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 7, no. 3, pp. 371–377, 1988
  37. Modeling the Effect of Redundancy on Yield and Performance of VLSI Systems
    IEEE Transactions on Computers, vol. C-36, no. 3, pp. 344–355, 1987
  38. The Concept and Implementation of Data-Driven Processor Arrays
    Computer, vol. 20, no. 7, pp. 102–103, 1987
  39. Analysis of a Class of Recovery Procedures
    IEEE Transactions on Computers, vol. C-35, no. 8, pp. 703–712, 1986
  40. Proceedings of the IEEE, vol. 74, no. 5, pp. 699–711, 1986
  41. A New Approach to the Evaluation of the Reliability of Digital Systems
    IEEE Transactions on Computers, vol. C-29, no. 3, pp. 261–267, 1980
  42. Reliability Analysis of N-Modular Redundancy Systems with Intermittent and Permanent Faults
    IEEE Transactions on Computers, vol. C-28, no. 7, pp. 514–520, 1979
  43. A Continuous-Parameter Markov Model and Detection Procedures for Intermittent Faults
    IEEE Transactions on Computers, vol. C-27, no. 6, pp. 567–570, 1978