Jürgen Teich
University of Erlangen-Nuremberg, Germany
Jürgen Teich received his Master's degree (Dipl. Ing.) in
1989 from the University of Kaiserslautern (with honors). From 1989
to 1993, he was a Ph.D. student at the University of Saarland,
Saarbrücken, Germany, from where he received his Ph.D. degree
(summa cum laude). His Ph.D. thesis entitled “A compiler for
application-specific processor arrays” summarizes his work on
extending techniques for mapping computation intensive algorithms
onto dedicated VLSI processor arrays. In 1994, he joined the DSP
Design Group of Prof. E. A. Lee and D. G. Messerschmitt in the
Department of Electrical Engineering and Computer Sciences (EECS) at
UC Berkeley, where he was working in the Ptolemy Project (postdoc).
From 1995 to 1998, he held a position at the Institute of Computer
Engineering and Communications Networks Laboratory (TIK) at ETH
Zürich, Switzerland, finishing his habilitation entitled
“Synthesis and optimization of digital hardware/software
systems” in 1996. From 1998 to 2002, he was a Full Professor
in the Electrical Engineering and Information Technology Department
of the University of Paderborn, holding a Chair in computer
engineering. Since 2003, he is appointed a Full Professor in the
Computer Science Institute of the Friedrich-Alexander University
Erlangen-Nuremberg holding the Chair of Hardware-Software Codesign.
He has been a Member of multiple program committees of well-known
conferences and workshops. He is a Member of the IEEE and the author
of a textbook edited by Springer in 1997. His research interests are
massive parallelism, embedded systems, codesign, and computer
architecture. Since 2004, he also has been an elected reviewer for
the German Science Foundation (DFG) for the area of computer
architecture and embedded systems. He is involved in many
interdisciplinary national basic research projects as well as
industrial projects. He is supervising 19 Ph.D. students currently.
Biography Updated on 13 April 2006
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