Wayne Wolf

Personal Home Page

http://www.princeton.edu/~wolf/

Articles in Scholarly Journals [Incomplete List]

  1. Roundtable: Envisioning the Future for Multiprocessor SoC
    IEEE Design & Test of Computers, vol. 24, no. 2, pp. 174–183, 2007
  2. Code Decompression Unit Design for VLIW Embedded Processors
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 15, no. 8, pp. 975–980, 2007
  3. Dataflow-Based Mapping of Computer Vision Algorithms onto FPGAs
    EURASIP Journal on Embedded Systems, vol. 2007, Article ID 49236, 12 pages, 2007
  4. Code Compression for Embedded VLIW Processors Using Variable-to-Fixed Coding
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 14, no. 5, pp. 525–536, 2006
  5. An Efficient Architecture for Motion Estimation and Compensation in the Transform Domain
    IEEE Transactions on Circuits and Systems for Video Technology, vol. 16, no. 2, pp. 191–201, 2006
  6. Guest Editors' Introduction: Multiprocessor Systems-on-Chips
    Computer, vol. 38, no. 7, pp. 36–40, 2005
  7. Hardware/Software Interface Codesign for Embedded Systems
    Computer, vol. 38, no. 2, pp. 63–69, 2005
  8. Building the Software Radio
    Computer, vol. 38, no. 3, pp. 87–89, 2005
  9. A methodology for architectural design of multimedia multiprocessor SoCs
    IEEE Design and Test of Computers, vol. 22, no. 1, pp. 18–26, 2005
  10. Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations
    IEEE Transactions on Computers, vol. 54, no. 6, pp. 714–726, 2005
  11. Approximate Arithmetic Coding for Bus Transition Reduction in Low Power Designs
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13, no. 6, pp. 696–707, 2005
  12. Design of a real-time gesture recognition system: high performance through algorithms and software
    IEEE Signal Processing Magazine, vol. 22, no. 3, pp. 57–64, 2005
  13. Embedded computing - Embedded is the new paradigm(s)
    Computer, vol. 37, no. 3, pp. 99–101, 2004
  14. Applications and architectures [microprocessor chips]
    Computer, vol. 37, no. 11, pp. 114–116, 2004
  15. Reducing Dynamic Power Consumption in Synchronous Sequential Digital Designs Using Retiming and Supply Voltage Scaling
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 12, no. 6, pp. 573–589, 2004
  16. How many system architectures?
    Computer, vol. 36, no. 3, pp. 93–95, 2003
  17. A decade of hardware/ software codesign
    Computer, vol. 36, no. 4, pp. 38–43, 2003
  18. Memory system optimization of embedded software
    Proceedings of the IEEE, vol. 91, no. 1, pp. 165–182, 2003
  19. A dictionary-based en/decoding scheme for low-power data buses
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 11, no. 5, pp. 943–951, 2003
  20. Journal of Circuits, Systems, and Computers, vol. 12, no. 2, p. 125, 2003
  21. Journal of Circuits, Systems, and Computers, vol. 11, no. 5, p. 537, 2002
  22. A hierarchical human detection system in (un)compressed domains
    IEEE Transactions on Multimedia, vol. 4, no. 2, pp. 283–300, 2002
  23. Household hints for embedded systems designers
    Computer, vol. 35, no. 5, pp. 106–108, 2002
  24. Smart cameras as embedded systems
    Computer, vol. 35, no. 9, pp. 48–53, 2002
  25. Structural and magnetic properties of O-bridged tetranuclear and binuclear Cu(II) complexes
    Inorganica Chimica Acta, vol. 333, no. 1, pp. 138–143, 2002
  26. A Graph-Based Object Description for Information Retrieval in Digital Image and Video Libraries
    Journal of Visual Communication and Image Representation, vol. 13, no. 4, pp. 425–459, 2002
  27. Multimedia Tools and Applications, vol. 14, no. 2, pp. 137–151, 2001
  28. RAGS-real-analysis ALAP-guided synthesis
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 20, no. 8, pp. 931–941, 2001
  29. An experimental analysis of digital video library servers
    Multimedia Systems, vol. 8, no. 2, pp. 135–145, 2000
  30. A circuit-driven design methodology for video signal-processing datapath elements
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 7, no. 2, pp. 229–240, 1999
  31. A Hierarchical Multiresolution Video Shot Transition Detection Scheme
    Computer Vision and Image Understanding, vol. 75, no. 1-2, pp. 196–213, 1999
  32. Design Automation for Embedded Systems, vol. 4, no. 4, pp. 215–242, 1999
  33. Hardware/software co-synthesis with memory hierarchies
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 10, pp. 1405–1417, 1999
  34. SAMC: a code compression algorithm for embedded processors
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 12, pp. 1689–1701, 1999
  35. A methodology and algorithms for the design of hard real-time multitasking ASICs
    ACM Transactions on Design Automation of Electronic Systems, vol. 4, no. 4, pp. 430–459, 1999
  36. Formal Methods in System Design, vol. 12, no. 3, pp. 241–265, 1998
  37. Performance estimation for real-time distributed embedded systems
    IEEE Transactions on Parallel and Distributed Systems, vol. 9, no. 11, pp. 1125–1136, 1998
  38. A design study of a 0.25-µm video signal processor
    IEEE Transactions on Circuits and Systems for Video Technology, vol. 8, no. 4, pp. 501–519, 1998
  39. Unifiable scheduling and allocation for minimizing system cycle time
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 5, no. 2, pp. 197–210, 1997
  40. An architectural co-synthesis algorithm for distributed, embedded computing systems
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 5, no. 2, pp. 218–229, 1997
  41. Journal of Electronic Testing, vol. 11, no. 3, pp. 211–225, 1997
  42. Object-oriented cosynthesis of distributed embedded systems
    ACM Transactions on Design Automation of Electronic Systems, vol. 1, no. 3, pp. 301–314, 1996
  43. A flexible parallel architecture adapted to block-matching motion-estimation algorithms
    IEEE Transactions on Circuits and Systems for Video Technology, vol. 6, no. 1, pp. 74–86, 1996
  44. An efficient graph algorithm for FSM scheduling
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 4, no. 1, pp. 98–112, 1996
  45. Asymptotic limits of video signal processing architectures
    IEEE Transactions on Circuits and Systems for Video Technology, vol. 5, no. 6, pp. 545–561, 1995
  46. Performance-driven synthesis in controller-datapath systems
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 2, no. 1, pp. 68–80, 1994
  47. Hardware-software co-design of embedded systems
    Proceedings of the IEEE, vol. 82, no. 7, pp. 967–989, 1994
  48. FSM decomposition for pipelined data
    Integration, the VLSI Journal, vol. 15, no. 2, pp. 117–131, 1993
  49. Object-oriented implementation issues in an experimental CAD system
    Software: Practice and Experience, vol. 22, no. 4, pp. 287–304, 1992
  50. Object programming for CAD
    IEEE Design & Test of Computers, vol. 8, no. 1, pp. 35–42, 1991
  51. A practical comparison of two object-oriented languages
    IEEE Software, vol. 6, no. 5, pp. 61–68, 1989
  52. Algorithms for optimizing, two-dimensional symbolic layout compaction
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 7, no. 4, pp. 451–466, 1988