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Articles in Scholarly Journals [Incomplete List]

1. Tighter Bounds for Graph Steiner Tree Approximation
   SIAM Journal on Discrete Mathematics, vol. 19, no. 1, p. 122, 2005
2. Compressible Area Fill Synthesis
   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 8, pp. 1169–1187, 2005
3. The moving-target traveling salesman problem
   Journal of Algorithms, vol. 49, no. 1, pp. 153–174, 2003
4. Area fill synthesis for uniform layout density
   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 21, no. 10, pp. 1132–1147, 2002
5. An improved approximation scheme for the Group Steiner Problem
   Networks, vol. 37, no. 1, pp. 8–20, 2000
6. Filling algorithms and analyses for layout density control
   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 4, pp. 445–462, 1999
7. On detecting spatial regularity in noisy images
   Information Processing Letters, vol. 69, no. 4, pp. 189–195, 1999
8. Placement and Routing for Performance-Oriented FPGA Layout
   VLSI Design, vol. 7, no. 1, pp. 97–110, 1998
9. How to test a tree
   Networks, vol. 32, no. 3, pp. 189–197, 1998
10. New performance-driven FPGA routing algorithms
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 15, no. 12, pp. 1505–1517, 1996
11. On the primer selection problem in polymerase chain reaction experiments
    Discrete Applied Mathematics, vol. 71, no. 1-3, pp. 231–246, 1996
12. Near-optimal critical sink routing tree constructions
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 14, no. 12, pp. 1417–1436, 1995
13. On the Minimum Density Interconnection Tree Problem
    VLSI Design, vol. 2, no. 2, pp. 157–169, 1994
14. Closing the gap: near-optimal Steiner trees in polynomial time
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 13, no. 11, pp. 1351–1365, 1994
15. Matching-based methods for high-performance clock routing
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 12, no. 8, pp. 1157–1169, 1993
16. Optimal robust path planning in general environments
    IEEE Transactions on Robotics and Automation, vol. 9, no. 6, pp. 775–784, 1993
17. On the performance bounds for a class of rectilinear Steiner tree heuristics in arbitrary dimension
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 11, no. 11, pp. 1462–1465, 1992
18. A new class of iterative Steiner tree heuristics with good performance
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 11, no. 7, pp. 893–902, 1992
19. Provably good performance-driven global routing
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 11, no. 6, pp. 739–752, 1992