Niraj K. Jha

Niraj K. Jha received his B.Tech. degree in electronics and electrical communication engineering from I.I.T., Kharagpur, India in 1981, an M.S. degree in electrical engineering from S.U.N.Y. at Stony Brook, NY in 1982, and a Ph.D. degree in electrical engineering from University of Illinois at Urbana-Champaign, III, USA in 1985. He is a Professor of electrical engineering at Princeton University. He is a Fellow of IEEE and ACM. Currently, he is serving as the Editor-in-Chief of IEEE Transactions on VLSI Systems and an Associate Editor of IEEE Transactions on Circuits and Systems II: Express Briefs, IEEE Transactions on Computer-Aided Design, and Journal of Low Power Electronics. He has served as an Editor of Journal of Electronic Testing: Theory and Applications (JETTA). He has also served as the Program Chairman of the 1992 Workshop on Fault-Tolerant Parallel and Distributed Systems and the 2004 International Conference on Embedded and Ubiquitous Computing (he gave the keynote speech on nanotechnology at this conference in 2005). He served as the Director of the Center for Embedded System-on-a-chip Design funded by New Jersey Commission on Science and Technology. He is the recipient of the AT&T Foundation Award and NEC Preceptorship Award for research excellence, NCR Award for teaching excellence, and Princeton University Graduate Mentoring Award. He has coauthored three books on digital system testing and power optimization. He has authored or coauthored more than 310 papers, seven of which have won the Best Paper Award. A paper of his was selected for The Best of ICCAD and another for IEEE Micro Magazine’s Top Picks of Computer Architecture Conferences. He has also received 12 USA patents. His research interests include nanotechnology, power/thermal efficient hardware and software design, computer-aided design of integrated circuits and systems, secure computing, and digital system testing.

Biography Updated on 14 October 2010

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