Soo-Ik Chae

Personal Home Page

http://ee.snu.ac.kr/paper/paper/publications_by_year_ee_eng.php?prof_id=p045

Articles in Scholarly Journals [Incomplete List]

  1. A Bootstrapped Switch for nMOS Reversible Energy Recovery Logic for Low-Voltage Applications
    IEICE Transactions on Electronics, vol. E89-C, no. 5, pp. 649–652, 2006
  2. A 0.25-<tex>$mu$</tex>m CMOS Quad-Band GSM RF Transceiver Using an Efficient LO Frequency Plan
    IEEE Journal of Solid-State Circuits, vol. 40, no. 5, pp. 1094–1106, 2005
  3. A 2.4-GHz 0.25-<tex>$muhboxm$</tex>CMOS Dual-Mode Direct-Conversion Transceiver for Bluetooth and 802.11b
    IEEE Journal of Solid-State Circuits, vol. 39, no. 7, pp. 1185–1190, 2004
  4. A Reset-Free Anti-Harmonic Delay-Locked Loop Using a Cycle Period Detector
    IEEE Journal of Solid-State Circuits, vol. 39, no. 11, pp. 2055–2061, 2004
  5. An Efficient Simulation Environment and Simulation Techniques for Bluetooth Device Design
    Design Automation for Embedded Systems, vol. 8, no. 2/3, pp. 119–138, 2003
  6. Two-step motion estimation algorithm for large search range using outlier pixel exclusion
    Electronics Letters, vol. 38, no. 2, p. 68, 2002
  7. Partial bus-invert coding for power optimization of application-specific systems
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 9, no. 2, pp. 377–383, 2001
  8. Extended mean-distance-ordered search using multiple l/sub 1/ and l/sub 2/ inequalities for fast vector quantization
    IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 47, no. 4, pp. 349–352, 2000
  9. nMOS reversible energy recovery logic for ultra-low-energy applications
    IEEE Journal of Solid-State Circuits, vol. 35, no. 6, pp. 865–875, 2000
  10. Rate-optimised motion estimation
    Electronics Letters, vol. 36, no. 14, p. 1196, 2000
  11. A 16-bit carry-lookahead adder using reversible energy recovery logic for ultra-low-energy systems
    IEEE Journal of Solid-State Circuits, vol. 34, no. 6, pp. 898–903, 1999
  12. Simple binary wavelet filters for efficient VLSI implementation
    Electronics Letters, vol. 35, no. 7, p. 555, 1999
  13. Hierarchical motion estimation in Hadamard transform domain
    Electronics Letters, vol. 35, no. 25, p. 2187, 1999
  14. Reversible energy recovery logic circuit without non-adiabatic energy loss
    Electronics Letters, vol. 34, no. 4, p. 344, 1998
  15. Reduction of bus transitions with partial bus-invert coding
    Electronics Letters, vol. 34, no. 7, p. 642, 1998
  16. Error-driven edge selection for -modulated signals to suppress in-band noise due to non-uniform sampling
    Electronics Letters, vol. 34, no. 7, p. 618, 1998
  17. Incremental-search fast vector quantiser using triangular inequalities for multiple anchors
    Electronics Letters, vol. 34, no. 12, p. 1192, 1998
  18. Simple reversible energy recovery logic using NMOS switch networks with cross-coupled PMOS pair
    Electronics Letters, vol. 34, no. 23, p. 2215, 1998
  19. New motion estimation algorithm using adaptively quantized low bit-resolution image and its VLSI architecture for MPEG2 video encoding
    IEEE Transactions on Circuits and Systems for Video Technology, vol. 8, no. 6, pp. 734–744, 1998
  20. A cost-effective architecture for HDTV video decoder in ATSC receivers
    IEEE Transactions on Consumer Electronics, vol. 44, no. 4, pp. 1353–1359, 1998
  21. Motion estimation algorithm using low resolution quantisation
    Electronics Letters, vol. 32, no. 7, p. 647, 1996
  22. Modified delta coding algorithm for real parameter optimisation
    Electronics Letters, vol. 31, no. 14, p. 1169, 1995
  23. Discrete-time cellular neural networks using distributed arithmetic
    Electronics Letters, vol. 31, no. 21, p. 1851, 1995