Articles in Scholarly Journals [Incomplete List]

1. Design space exploration of reliable networked embedded systems
   Journal of Systems Architecture, vol. 53, no. 10, pp. 751–763, 2007
2. Efficient control generation for mapping nested loop programs onto processor arrays?
   Journal of Systems Architecture, vol. 53, no. 5-6, pp. 300–309, 2007
3. The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer
   The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, vol. 47, no. 1, pp. 15–31, 2007
4. A SystemC-Based Design Methodology for Digital Signal Processing Systems
   EURASIP Journal on Embedded Systems, vol. 2007, Article ID 47580, 22 pages, 2007
5. Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices
   IEEE Transactions on Computers, vol. 56, no. 5, pp. 673–680, 2007
6. Dynamically Reconfigurable Architectures
   EURASIP Journal on Embedded Systems, vol. 2007, Article ID 28405, 2 pages, 2007
7. Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems
   EURASIP Journal on Embedded Systems, vol. 2006, Article ID 42168, 15 pages, 2006
8. Analysis of Dataflow Programs with Interval-limited Data-rates
   The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, vol. 43, no. 2-3, pp. 247–258, 2006
9. Systematic Integration of Parameterized Local Search Into Evolutionary Algorithms
   IEEE Transactions on Evolutionary Computation, vol. 8, no. 2, pp. 137–155, 2004
10. The Journal of Supercomputing, vol. 26, no. 2, pp. 149–165, 2003
11. Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware
    EURASIP Journal on Applied Signal Processing, vol. 2003, no. 6, pp. 594–602, 2003
12. Journal of Circuits, Systems, and Computers, vol. 12, no. 3, p. 353, 2003
13. SPI - a system model for heterogeneously specified embedded systems
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 10, no. 4, pp. 379–389, 2002
14. FunState-an internal design representation for codesign
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 9, no. 4, pp. 524–544, 2001
15. The Journal of Supercomputing, vol. 19, no. 1, pp. 57–75, 2001
16. Extending Partial Suborders
    Electronic Notes in Discrete Mathematics, vol. 8, pp. 34–37, 2001
17. Evolutionary algorithms for the synthesis of embedded software
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 8, no. 4, pp. 452–455, 2000
18. The Journal of VLSI Signal Processing, vol. 24, no. 1, pp. 83–98, 2000
19. Design Automation for Embedded Systems, vol. 3, no. 1, pp. 23–58, 1998
20. The Journal of VLSI Signal Processing, vol. 17, no. 1, pp. 5–20, 1997
21. Performance analysis and optimization of mixed asynchronous synchronous systems
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, no. 5, pp. 473–484, 1997
22. Partitioning of processor arrays: a piecewise regular approach
    Integration, the VLSI Journal, vol. 14, no. 3, pp. 297–332, 1993
23. Control generation in the design of processor arrays
    Journal of VLSI Signal Processing, vol. 3, no. 1-2, pp. 77–92, 1991