ISRN Software Engineering
Volume 2012 (2012), Article ID 324054, 22 pages
Synthesis of Test Scenarios Using UML Sequence Diagrams
1Department of CSE, Manipal Institute of Technology, Manipal 576104, India
2School of Information Technology, Indian Institute of Technology, Kharagpur 721302, India
Received 20 December 2011; Accepted 8 February 2012
Academic Editors: S. D. Kim and H. Okamura
Copyright © 2012 Ashalatha Nayak and Debasis Samanta. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
UML 2.0 sequence diagrams are used to synthesize test scenarios. A UML 2.0 sequence diagram usually consists of a large number of different types of fragments and possibly with nesting. As a consequence, arriving at a comprehensive system behavior in the presence of multiple, nested fragment is a complex and challenging task. So far the test scenario synthesis from sequence diagrams is concerned, the major problem is to extract an arbitrary flow of control. In this regard, an approach is presented here to facilitate a simple representation of flow of controls and its subsequent use in the test scenario synthesis. Also, the flow of controls is simplified on the basis of UML 2.0 control primitives and brought to a testable form known as intermediate testable model (ITM). The proposed approach leads to the systematic interpretation of control flows and helps to generate test scenarios satisfying a set of coverage criteria. Moreover, the ability to support UML 2.0 models leads to increased levels of automation than the existing approaches.