Copyright © 2013 Jerry Wu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Intel Moore observed an exponential doubling in the number of transistors in every 18 months through the size reduction of transistor components since 1965. In viewing of mobile computing with insatiate appetite, we explored the necessary enhancement by an increasingly maturing nanotechnology and facing the inevitable quantum-mechanical atomic and nuclei limits. Since we cannot break down the atomic size barrier, the fact implies a fundamental size limit at the atomic/nucleus scale. This means, no more simple 18-month doubling, but other forms of transistor doubling may happen at a different slope. We are particularly interested in the nano enhancement area. (i) 3 Dimensions: If the progress in shrinking the in-plane dimensions is to slow down, vertical integration can help increasing the areal device transistor density. As the devices continue to shrink into the 20 to 30 nm range, the consideration of thermal properties and transport in such devices becomes increasingly important. (ii) Quantum computing: The other types of transistor material are rapidly developed in laboratories worldwide, for example, Spintronics, Nanostorage, HP display Nanotechnology, which are modifying this Law. We shall consider the limitation of phonon engineering fundamental information unit “Qubyte” in quantum computing, Nano/Micro Electrical Mechanical System (NEMS), Carbon Nanotubes, single-layer Graphenes, single-strip Nano-Ribbons, and so forth.