Research Article

Charge-Trapping Devices Using Multilayered Dielectrics for Nonvolatile Memory Applications

Table 1

Comprised memory parameters of the charge trapping devices.

Trapping layerTa2O5 (this work)Ta2O5 [11]Ta2O5 [12]Y2O3 [14]Y2O3 [15]HfO2 [16]HfO2 [17]ZrO2 [18]La2O3 [19]Dy2O3 [20]

Program speed10 ns1  s10 ns0.1 ms0.1 ms1  s10  s0.1 ms0.1 ms~0.1 s
 V  V  V  V  V  V  V  V  V
 V  V  V  V  V  V  V  V  V
 V  V  V  V  V

Erase speed100 ns10 ns1 μs10 μs10 μs0.1 ms10 μs10 ms0.1 ms~0.1 s
 V  V  V  V  V  V  V  V  V
 V  V  V  V  V  V  V  V  V
 V  V  V  V  V

Memory window1.6 V0.8 V2.5 V2.3 V2.4 V1.2–1.5 V1.5 V2.7 V2 V~1.5 V

Retention0.81 V0.64 V0.64 V8%CL4%CL10%CL6%CL5%CL9%CL0.9 V
(3 × 108 s)(3 × 108 s)(3 × 108 s)(104 s)(104 s)(105 s)(104 s)(104 s)(108 s)(3 × 108 s)

CL: charge loss.