A Substrate-and-Gate Triggering NMOS Device for High ESD Reliability in Deep Submicrometer Technology
Figure 2
(a) The equivalent circuit for the gate-grounded multifinger ESD devices. (b) The equivalent circuit for the resistance and RC multifinger substrate-and-gate triggering devices. (c) The layout diagram of the RC SGTNMOS device with butting pickups in the NMOS source diffusions. (d) The layout diagram of the RC SGTNMOS device with inserted pickups in the NMOS source diffusions.
