Research Article

A Substrate-and-Gate Triggering NMOS Device for High ESD Reliability in Deep Submicrometer Technology

Figure 5

(a) versus resistance characteristics among the GGNMOS and resistance SGTNMOS. (b) versus characteristics among the GGNMOS and RC-SGTNMOS. (c) versus resistance characteristics among the GGNMOS and resistance SGTNMOS. (d) versus resistance characteristics among the GGNMOS and RC SGTNMOS.
905686.fig.005a
(a)
905686.fig.005b
(b)
905686.fig.005c
(c)
905686.fig.005d
(d)