532351.fig.004a
(a)
532351.fig.004b
(b)
532351.fig.004c
(c)
Figure 4: (a) Dark lock-in thermography (DLIT) image of one test structure with self-aligned emitter groove metallization after the baking procedure. The image was taken at a lock-in frequency of 20 Hz, using a forward bias voltage of 250 mV. (b) is the same as (a), but for a reverse bias voltage of 250 mV. (c) Topography image of the same sample region for comparison.