- About this Journal ·
- Abstracting and Indexing ·
- Aims and Scope ·
- Article Processing Charges ·
- Author Guidelines ·
- Bibliographic Information ·
- Citations to this Journal ·
- Contact Information ·
- Editorial Board ·
- Editorial Workflow ·
- Free eTOC Alerts ·
- Publication Ethics ·
- Recently Accepted Articles ·
- Reviewers Acknowledgment ·
- Submit a Manuscript ·
- Subscription Information ·
- Table of Contents
Advances in Optical Technologies
Volume 2008 (2008), Article ID 245131, 6 pages
Hybrid Silicon Photonics for Low-Cost High-Bandwidth Link Applications
Kotura Inc., 2630 Corporate Place, Monterey Park, CA 91754, USA
Received 22 December 2007; Accepted 27 March 2008
Academic Editor: D. Lockwood
Copyright © 2008 B. Jonathan Luff et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Current discrete optical solutions for high data-rate link applications, even with potentially high manufacturing volumes, are too costly. Highly integrated, multifunction modules are a key part of the solution, reducing size and cost while providing improved reliability. Silicon, with its proven manufacturability and reliability, offers a solid foundation for building a cost-efficient path to successful products. In this paper, recent work on the development of silicon photonic enabling components for multichannel high data-rate links is presented.
High-speed consumer connections are becoming more prevalent due to the introduction of newer services such as online video, HDTV, IPTV, and the increase of personalized data content. This is leading to significant connectivity bottlenecks in the network infrastructure of, for example, datacenters, campus networks, and storage area networks. Internet exchanges and network centers have expanded to as many as optical fibers routing traffic at speeds of 10 Gbps. The availability of cost-effective interface solutions operating at data rates of multiples of 10 Gbps or above over a single fiber will enable the proliferation of these new services by greatly reducing the wiring complexity, instrumentation, and operating cost in high-capacity fiber-optic networks. In this paper, we discuss the development of components based on a silicon photonics hybrid platform that will create a compact and low-cost solution for multiple channel transmission over single mode fiber. Initial work focuses on a 10 channel/10 Gbps per channel solution, but extension of channel count and/or modulation speed is envisioned, enabling aggregate data rates of up to 1 Tbps for a 25 channel, 40 Gbps solution.
The approach is illustrated in Figure 1. On the transmit (Tx) side of the link, light at multiple wavelengths from a hybridized laser array is multiplexed onto a single fiber. After transmission over the fiber, the light is coupled onto the receiver (Rx) chip where the wavelength channels are demultiplexed and detected using a hybridized photodiode array. The silicon platform is able to support the formation of low-loss RF traces onchip to enable space-efficient positioning of driver and receiver electronics. Transimpedance amplifiers (TIAs) may also be hybridized onchip if that is appropriate to a particular packaging solution. Laser diode output power monitoring may be accomplished by hybridized back-facet monitor photodiodes. Alternatively, as illustrated in Figure 1, the silicon photonics platform offers the option of front-facet monitoring through the fabrication of tap coupler and the hybridization of PIN photodiodes . It is also possible to monolithically fabricate monitor diodes in silicon using defect engineering . A useful function that may be included in future devices is per channel variable attenuation, a well-established monolithic functional element in silicon technology .
The refractive index of silicon is similar to that of active materials such as GaAs and InP, facilitating efficient coupling between silicon waveguides, and hybridized active devices such as lasers and photodetectors. For powered devices such as lasers, the high thermal conductivity of silicon enables efficient heat removal and good equalization of temperature across a chip.
The basic silicon-on-insulator (SOI) waveguide ridge structure used in this work is shown in Figure 2. Vertical confinement is provided by the buried layer of oxide inside the wafer (SOI) and a top layer of oxide deposited on the waveguide during fabrication. Lateral confinement is provided by the ridge structure. Such waveguides can be designed to be single mode based on correct choice of ridge height and width.
The manufacturing process for the basic waveguide is based on pattern definition by an appropriate masking layer and subsequent photolithography. RIE etch is used to achieve the required topology. Following the removal of the masking layer, an oxide cladding layer is deposited followed by a protective nitride thin film.
A key challenge for a Si photonics platform is coupling light efficiently on and off the chip. The large index of Si drives small waveguide dimensions, which enables highly compact structures, but in turn can cause high beam divergence off chip and high mode mismatch to other optical components such as fibers. Although not implemented for the devices described in this paper, the Si photonics platform enables the fabrication of three dimensional tapers (Figure 3) that can significantly reduce fiber coupling loss to standard single-mode fiber. If necessary, taper structures can also be used to improve coupling efficiency to hybridized optical components.
2. Silicon Mux and Demux
Silicon-based multiplexers and demultiplexers are the critical passive elements in a multichannel link system using a single fiber. The key challenges are the design and fabrication of low loss, low crosstalk, and small footprint devices. The echelle grating-based design (Figure 4) is favored for use in the link architecture because of its much smaller footprint compared to, for example, an arrayed waveguide grating (AWG) design . A wavelength channel spacing of 20 nm was chosen for fabrication of a demonstration device. This channel spacing is typically used in coarse wavelength division multiplexing (CWDM) systems, and will ensure sufficient passband width to accommodate the spectral deviation of laser wavelength and filter passband position due to temperature and polarization variations.
The loss of echelle grating arises mainly from nonvertical grating facets and facet roughness. It is difficult to make both a smooth and vertical grating facet because of fabrication limitations. Grating performance variation due to wall roughness and verticality are shown in Figures 5(a) and 5(b), respectively. For this work, the roughness of the grating facets is estimated from SEM measurements as ~11 nm, and the verticality as ~1.5 degrees. Projected process developments are likely to improve these values to ~7 nm and 0.5 degrees, respectively.
Another important factor influencing the loss of the mux and demux element is the rounding of the grating teeth element within the echelle grating design. This can be reduced with better photolithographic tools and etching processes as indicated in Figure 6.
Nonguided stray light and scattered light from the rough grating facet can generate high optical crosstalk in an echelle grating. To reduce crosstalk and enhance performance, proprietary absorber structures were utilized.
To make the silicon demux polarization independent, a relatively large silicon waveguide core size is used (waveguide height and waveguide width are both ~3 μm). The buried oxide thickness is approximately 0.4 μm. The drawback of using large area waveguides is that the minimum waveguide bending radius for single mode operation is large (~5 mm) and although the echelle grating itself can be very small, the waveguide fan-in and fan-out can take up much of the available space because of the bend radius limitation. For this work, sharp waveguide bends using a deep-etched multimode curved waveguide with tapered transitions into the bend to maintain power in the fundamental mode were used. Using this method, the bending radius was reduced to approximately 0.25 mm so that the overall silicon mux and demux footprints were reduced to <1 cm2 for 10-channel devices with 20 nm channel spacing. Because the outputs of the receive waveguides in the architecture of Figure 1 can be coupled directly to hybridized photodiodes, for the demux design a flat-top output spectrum was produced by using multimode output waveguides. Measured transmission spectra from fabricated multiplexer and demultiplexer devices are shown in Figure 7.
The mux demonstrated 6.5 dB insertion loss over the passband of 6.4 nm; PDL was <0.5 dB. Because the refractive index of silicon has a similar temperature variation to that of InP, this passband is sufficient to ensure low transmission loss is maintained over a wide temperature change because the mux passband will track the drift in the emission wavelength of the DFB laser. Figure 8 shows expected temperature variations for typical InP/InGaAsP DFB lasers from two different manufacturers compared with the calculated variation for a silicon multiplexer device. For comparison, the much smaller temperature variation expected for a silica-based device is included. A large channel spacing ensures that only very coarse and thus low-cost heater-based temperature control solution is required for stable operation over normal ambient conditions (typically 0–70°C). The demux device shown in Figure 7(b) demonstrated 4 dB insertion loss over a passband of 12 nm, <0.5 dB PDL, and better than 22 dB crosstalk.
Although a 10 channel device has been demonstrated, the design can be readily extended to higher channel counts. The optimum channel count for a given application will depend on multiple factors including per channel modulation speed, laser wavelength range, required bandwidth over a given temperature range, and minimum chip footprint.
3. Hybrid Integration
To produce an interface for the highly efficient optical transition between a semiconductor laser and the silicon waveguide, the mode profile mismatch and surface reflection between the laser and the waveguide should be reduced as much as possible. This modal mismatch can be improved by appropriate tailoring of the laser structure.
The silicon ridge waveguide structure can be optimized to obtain low coupling loss to the laser. Even at 5 μm separation between the two facets, the coupling loss can potentially be lower than 3 dB for silicon waveguides with different ridge width ranging from 3 to 7 μm. A specific ridge width within this range can thus be chosen to well match the diverging laser mode and provide some tolerance to alignment errors for a targeted gap size. Coupling loss can theoretically be less than 1 dB if the gap size (-direction gap) is smaller than 2 μm. However, the coupling of the laser to the waveguide in the direction perpendicular to the plane of the chip () and along the plane of the chip () requires alignment to a few tenths of a micron to obtain low coupling loss. Figure 9 shows the calculated coupling loss taking into account possible alignment errors as a function of silicon waveguide width () for a typical DFB laser.
To reduce the amount of reflected light coupled back into the laser cavity, the waveguide facet can be etched in such a way so that it is tilted at an angle (>10°) away from the optical axis of the laser beam. A nitride film of thickness ~200 nm on the waveguide surface further reduces the reflectivity of the facet. When the laser facet is 4 μm away, the total reflected light coupled back into the laser can be kept below −30 dB over a wavelength range of 200 nm (Figure 10).
The effective aperture of a high-speed (≥10 Gbps) detector is typically smaller than 30 μm in diameter to obtain low capacitance and large bandwidth. To prevent large beam divergence and achieve high detection efficiency, the gap between the output facet of a waveguide and the detector surface must be as small as possible.
The electronic connection employing conventional wire bonds between the detector die to the transimpedance amplifier (TIA) circuits may introduce too much unwanted parasitic capacitance and inductance that limits the speed of the receiver, especially for higher than 10 Gbps detection speed. Two possible methods of hybridization can be considered: edge coupling and flip-chip coupling.
When the detector is vertically attached to the edge of the waveguide chip, the waveguide facet can be almost in direct contact with the detector surface. The detector to waveguide alignment is relatively simple because the effective detection area can be a few times larger than the waveguide mode size. The relatively large aperture of the photodiode covers the entire mode profile at the waveguide facet and ensures high optical detection efficiency. A ceramic submount can be used to fasten the detector (e.g., at the p-side) with necessary metal contacts and traces that can readily be connected to a separated amplifier IC chip through wire bonding. The main disadvantage of this approach is that the waveguide edge needs to be polished, and hence it is not suitable for low-cost, high-volume manufacture.
A more manufacturable approach is to flip-chip bond the detector onto the silicon chip surface (p-side up), where an etched reflective mirror redirects the output beam to the detector surface, as shown in Figure 11. A smooth direction crystal plane with a 54.7° angle results from the anisotropic etching on the silicon surface; it is coated with aluminum to enhance reflectivity. The etched waveguide facet is coated with a thin nitride antireflection film to minimize the reflection loss at the silicon-to-air interface.
All electronic contacts can be made through the solder pads and metal traces directly plated on the silicon surface. A separate amplifier IC chip with conducting via holes can be attached onto the silicon chip surface to facilitate low parasitic electronic contact for high-speed operation. Alternatively, the detector can be integrated with the amplifier circuits before being mounted on the silicon chip.
4. Power Budget
The available power budget for a point-to-point transmission system determines the optical loss performance targets for the components making up the system. The maximum optical loss permissible for the system is determined by the output power of the laser source and the sensitivity of the detector. However, the sensitivity of the detector is not only dependent upon the speed, but also on the extinction of the source signal. For example, if the output power of a DFB laser is +6 dBm and the maximum sensitivity of a PIN detector is −17 dBm at 10 Gbps at an extinction of ~5 dB, then the maximum optical loss budget is +23 dB for 10 × 10 Gbps transmission. Table 1 summarizes the projected loss budget assuming use of the mux/demux components demonstrated in this paper.
We have discussed the feasibility of using the silicon photonics platform to provide a viable route to low-cost and compact single-fiber transmission solutions through hybridization of actives with low coupling loss and high-performance mux-demux capability. Although this work concentrated on a 10-channel solution and 10 Gbps data rate per channel, implementation with a greater number of channels and higher data rates is readily achievable.
The authors would like to thank Bob Hartman and Uzi Koren of CyOptics Inc. for technical discussions on the performance of active devices and loss budget. A portion of this work is being funded by the Advanced Technology Program managed by NIST.
- B. T. Smith, H. Lei, C.-C. Kung, D. Feng, J. Yin, and H. Liang, “Integrated silicon photonic circuit: monolithic 8-channel modulator, tap, vertical coupler, and flip-chip mounted photodetector array,” in Silicon Photonics, vol. 6125 of Proceedings of SPIE, San Jose, Calif, USA, January 2006.
- A. P. Knights, J. D. B. Bradley, S. H. Gou, and P. E. Jessop, “Silicon-on-insulator waveguide photodetector with self-ion-implantation-engineered-enhanced infrared response,” Journal of Vacuum Science & Technology A, vol. 24, no. 3, 783 pages, 2006.
- B. Jalali and S. Fathpour, “Silicon photonics,” Journal of Lightwave Technology, vol. 24, no. 12, 4600 pages, 2006.
- S. Bidnyk, D. Feng, A. Balakrishnan, et al., “Silicon-on-insulator-based planar circuit for passive optical network applications,” IEEE Photonics Technology Letters, vol. 18, no. 22, 2392 pages, 2006.