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International Journal of Power Management Electronics
Volume 2008 (2008), Article ID 862510, 9 pages
http://dx.doi.org/10.1155/2008/862510
Research Article

A Novel Soft-Switching Synchronous Buck Converter for Portable Applications

1Department of Electrical Engineering, National Institute of Technology, Rourkela 769008, India
2Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela 769008, India

Received 8 June 2007; Revised 26 October 2007; Accepted 10 December 2007

Academic Editor: Burak Ozpineci

Copyright © 2008 Anup Kumar Panda et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

This paper proposes a zero-voltage-transition (ZVT) pulse-width-modulated (PWM) synchronous buck converter, which is designed to operate at low voltage and high efficiency typically required for portable systems. A new passive auxiliary circuit that allows the main switch to operate with zero-voltage switching has been incorporated in the conventional PWM synchronous buck converter. The operation principles and a detailed steady-state analysis of the ZVT-PWM synchronous converter implemented with the auxiliary circuit are presented. Besides, the main switch and all of the semiconductor devices operate under soft-switching conditions. Thus, the auxiliary circuit provides a larger overall efficiency. The feasibility of the auxiliary circuit is confirmed by simulation and experimental results.

1. Introduction

Current trends in consumer electronics demand progressively lower-voltage supplies. Portable electronics equipment, such as laptop computers, cellular phones, and future microprocessor and memory chips, requires low-power circuitry to maximize battery run time. Because of significantly lower conduction losses, synchronous rectifiers are now used in essentially all low-voltage DC power supplies [14]. A synchronous rectifier is an electronic switch that improves power-conversion efficiency by placing a low-resistance conduction path across the diode rectifier in a switch-mode regulator. MOSFETs usually serve this purpose.

However, higher input voltages and lower output voltages have brought about very low duty cycles, increasing switching losses and decreasing conversion efficiency. So in this paper, we have optimized the efficiency of the synchronous buck converter by eliminating switching losses using soft-switching technique. The voltage-mode soft-switching method that has attracted most interest in recent years is the zero-voltage transition [524]. This is because of its low additional conduction losses and because its operation is closest to the PWM converters. The auxiliary circuit of the ZVT converters is activated just before the main switch is turned on and ceases after it is accomplished. The auxiliary circuit components in this circuit have lower ratings than those in the main power circuit because the auxiliary circuit is active for only a fraction of the switching cycle; this allows a device that can turn on with fewer switching losses than the main switch to be used as the auxiliary switch. The improvement in efficiency caused by the auxiliary circuit is mainly due to the difference in switching losses between the auxiliary switch and the main power switch if it were to operate without the help of the auxiliary circuit. Previously proposed ZVT-PWM converters have at least one of the following key drawbacks. (i) The auxiliary switch is turned off while it is conducting current. This causes the switching losses and EMI to appear, which offsets the benefits of using the auxiliary circuit. In converters such as the ones proposed in [6, 12, 15, 16], the turnoff is very hard. (ii) The auxiliary circuit causes the main converter switch to operate with a higher peak current stress and with more circulating current. This results in the need for a higher current-rated device for the main switch and an increase in conduction losses. The converters proposed in [5, 8, 9, 13, 14, 17] are having high current stresses on the main switch. (iii) The auxiliary circuit components have high voltage and/or current stresses, such as converters proposed in [5, 8, 9, 14, 17]. The converter proposed in [23] reduces the current stress on the main switch, but the circuit is very complex. (iv) In addition, most active circuits are seriously criticized due to their complexity, high cost, difficult control, large circulating energy, excessive voltage and current stresses, and also narrow line and load ranges. Additionally, it has been reported that the passive circuits are cheaper and more reliable and have a higher performance/cost ratio than the active ones [25, 26].

Reducing switching losses for low-power circuit such as synchronous buck is not known to be present in the literatures [126]. The converter shown in Figure 1 is designed for a low-voltage, high-current circuit, and it is found to be highly efficient. Hence, this paper presents a new class of ZVT synchronous buck converters. By using a resonant auxiliary network, the proposed converters achieve zero-voltage switching for the main switch and synchronous switch, and zero-current switching for the auxiliary switch without increasing their voltage and current stresses.

862510.fig.001
Figure 1: The proposed synchronous buck converter.

The paper is organized as follows. Section 2 gives a short description of the proposed circuit followed by a review of the various modes of operation with their key waveforms and the representation of their equivalent operation modes and analysis. Section 3 presents the design considerations and Section 4 includes basic features of the converter. Section 5 includes simulation and experimental results to illustrate the features of the proposed converter scheme. Section 6 includes some conclusions.

2. The ZVT-PWM Synchronous Buck Converter

2.1. Circuit Description and Assumption

The ZVT-PWM synchronous buck converter is shown in Figure 1. It is the combination of the conventional PWM synchronous buck converter and the proposed auxiliary snubber circuit. The auxiliary circuit consists of a resonant inductor 𝐿 r , resonant capacitor 𝐶 r , a buffer capacitor 𝐶 b , and three auxiliary Schottky diodes 𝐷 S 1 , 𝐷 S 2 , and 𝐷 S 3 . Body diodes of main switch S and synchronous switch S 1 are also utilized in this converter.

To analyze the steady-state operations of the proposed circuit, the following assumptions are made during one switching cycle.

(1)Input voltage 𝑉 i is constant.(2)Output voltage 𝑉 o is constant or output capacitor 𝐶 o is large enough.(3)Output current 𝐼 o is constant or output inductor 𝐿 o is large enough.(4)Output inductor 𝐿 o is much larger than resonant circuit inductor 𝐿 r .(5)Resonant circuits are ideal.(6)Semiconductor devices are ideal.(7)Reverse recovery time of all diodes is ignored.

2.2. Operation Principles and Analysis

Based on these assumptions, circuit operations in one switching cycle can be divided into eight stages. The key waveforms of these stages are given in Figure 2 and the equivalent circuit schemes of the operation stages are given in Figure 3. The detailed analysis of every stage is presented as follows.

862510.fig.002
Figure 2: Key theoretical waveforms of the proposed converter.
fig3
Figure 3: Modes of operation.

Mode 1 t0-t1. Prior to t1, the body diode of switch S 1 was conducting, while the main switch S was off. The equations 𝑖 S = 0 , 𝑖 𝐷 1 = 𝐼 o , 𝑖 𝐿 r = 0 , 𝑣 𝐶 r = 0 , 𝑣 𝐶 b = 0 are valid at the beginning of this stage. At t = t0, the main switch is turned on, which realizes zero-current turn-on as it is in series with the resonant inductor 𝐿 r . During this stage, 𝑖 𝐿 r rises and current iD1 through body diode of switch S 1 falls simultaneously at the same rate linearly. The mode ends at t = t1 when 𝑖 𝐿 r reaches 𝐼 o and iD1 becomes zero. The body diode D1 is turned off with ZVS because of 𝐶 r and 𝐶 b being existent. In this state, 𝑖 S = 𝑖 𝐿 r = 𝑉 i 𝐿 r 𝑡 𝑡 0 , 𝑖 𝐷 1 = 𝐼 o 𝑖 𝐿 r 𝑉 = i 𝐿 r 𝑡 𝑡 0 + 𝐼 o , 𝑡 0 1 = 𝐿 r 𝑉 i 𝐼 o . ( 1 )

Mode 2 t1-t2. The diode 𝐷 S 2 starts conducting at the instant when body diode D1 is turned off. At t = t1, 𝐼 S = 𝑖 𝐿 r = 𝐼 o , iD1 = 0, 𝑣 𝐶 r = 0 , and 𝑣 𝐶 b = 0 . In this interval, resonance occurs with the inductor 𝐿 r and capacitors 𝐶 r and 𝐶 b . This mode ends with 𝐶 r charged up to the input voltage 𝑉 i ; 𝑖 𝐿 r 𝑡 𝑡 1 = 𝑉 i 𝑍 1 s i n 𝜔 1 𝑡 𝑡 1 + 𝐼 o , 𝑣 𝐶 r 𝑡 𝑡 1 = 𝐶 𝑒 𝐶 r 𝑉 i c o s 𝜔 1 𝑡 𝑡 1 + 𝑉 i , 𝑣 𝐶 b 𝑡 𝑡 1 = 𝐶 𝑒 𝐶 b 𝑉 i c o s 𝜔 1 𝑡 𝑡 1 + 𝑉 i , ( 2 ) where 𝐶 𝑒 = 𝐶 r 𝐶 b 𝐶 r + 𝐶 b , 𝜔 1 = 1 𝐿 r 𝐶 𝑒 , 𝑍 1 = 𝐿 r 𝐶 𝑒 . ( 3 ) The diode 𝐷 S 1 is turned on with ZVS at the moment when 𝑣 𝐶 r becomes 𝑉 i . In this state, 𝑡 1 2 = 1 𝜔 1 s i n 1 𝐶 r 𝐶 𝑒 1 . ( 4 )

Mode 3 t2-t3. At t = t2, 𝑖 S = 𝐼 o , 𝑖 𝐿 r = 𝑖 𝐿 r m a x , 𝑣 𝐶 r = 𝑉 𝐶 r m a x = 𝑉 i , and 𝑣 𝐶 b = 𝑉 𝐶 b 1 . When diode 𝐷 S 1 turns on, new resonance starts with 𝐿 r and 𝐶 b . This mode ends when 𝑖 𝐿 r becomes equal to load current 𝐼 o , and 𝐶 b is charged up to its maximum voltage 𝑉 𝐶 b 𝑚 . Both diodes 𝐷 S 1 and 𝐷 S 2 are turned off under ZCS due to the existence of 𝐿 r . The voltage and current expressions that govern this circuit mode are given by 𝑖 𝐿 r 𝑡 𝑡 2 = 𝐼 𝐿 r m a x 𝐼 o c o s 𝜔 2 𝑡 𝑡 2 𝑉 𝐶 b 1 𝑍 2 s i n 𝜔 2 𝑡 𝑡 2 + 𝐼 o , 𝑣 𝐶 b 𝑡 𝑡 2 = 𝐼 𝐿 r m a x 𝐼 o 𝑍 2 s i n 𝜔 2 𝑡 𝑡 2 + 𝑉 𝐶 b 1 c o s 𝜔 2 𝑡 𝑡 2 . ( 5 ) The time interval of this stage can be found as follows: 𝑡 2 3 = 1 𝜔 2 t a n 1 𝐼 𝐿 r m a x 𝐼 o 𝑉 𝐶 b 1 , ( 6 ) where 𝜔 2 = 1 𝐿 r 𝐶 b , 𝑍 2 = 𝐿 r 𝐶 b . ( 7 )

Mode 4 t3-t4. Since both diodes 𝐷 S 1 and 𝐷 S 2 have been turned off at t3, now only the main switch S and inductor 𝐿 r carry the load current. There is no resonance in this mode and the circuit operation is identical to that of a conventional PWM buck converter. The voltage and current equations for this mode are 𝑖 S = 𝑖 𝐿 r = 𝐼 o . ( 8 )

Mode 5 t4-t5. This mode starts with the initial conditions 𝑖 S = 𝐼 o , 𝑖 𝐿 r = 𝐼 o , 𝑣 𝐶 r = 𝑉 𝐶 r m a x = 𝑉 i , 𝑉 𝐶 b = 𝑉 𝐶 b 𝑚 . The main switch is turned off under ZVS, and at the same instant, the synchronous switch is turned on under ZCS. Since the synchronous switch S 1 is conducting the voltage across capacitor, 𝐶 b is clamped to zero. Resonance occurs with 𝐿 r and 𝐶 r . The voltage and current equations for this mode are 𝑣 𝐶 b 𝑡 𝑡 4 𝑖 = 0 , 𝐿 r 𝑡 𝑡 4 = 𝐼 o c o s 𝜔 3 𝑡 𝑡 4 𝑉 i 𝑍 3 s i n 𝜔 3 𝑡 𝑡 4 , 𝑣 ( 9 ) 𝐶 r 𝑡 𝑡 4 = 𝐼 o 𝑍 3 s i n 𝜔 3 𝑡 𝑡 4 + 𝑉 i c o s 𝜔 3 𝑡 𝑡 4 . ( 1 0 )

The time duration of this mode can be found as follows: 𝑡 4 5 = 1 𝜔 3 t a n 1 𝑉 i 𝐼 o 𝑍 3 , ( 1 1 ) where 𝜔 3 = 1 𝐿 r 𝐶 r , 𝑍 3 = 𝐿 r 𝐶 r . ( 1 2 ) This mode ends when voltage across 𝐶 r becomes zero. Therefore, the diode 𝐷 S 2 turns on under ZVS.

Mode 6 t5-t6. In this stage, new resonance takes place through 𝐿 r - 𝐶 b - 𝐷 S 2 - 𝐷 S 1 . At t = t5, 𝑖 S = 0, 𝑖 𝐿 r = 𝐼 𝐿 r 2 , 𝑣 𝐶 r = 0 , and 𝑣 𝐶 b = 0 are initial conditions for this mode. For this state, the equations are 𝑣 𝐶 b 𝑡 𝑡 5 = 𝐼 𝐿 r 2 𝑍 2 s i n 𝜔 2 𝑡 𝑡 5 , 𝑖 𝐿 r 𝑡 𝑡 5 = 𝐼 𝐿 r 2 c o s 𝜔 2 𝑡 𝑡 5 . ( 1 3 ) When 𝑖 𝐿 r becomes 𝐼 o , this mode comes to an end. The time interval for this mode is given as 𝑡 5 6 = 1 𝜔 2 t a n 1 𝐼 o 𝐼 𝐿 r 2 , ( 1 4 ) where 𝜔 2 = 1 𝐿 r 𝐶 b , 𝑍 2 = 𝐿 r 𝐶 b . ( 1 5 )

Mode 7 t6-t7. At t = t6, 𝑖 S = 0 , 𝑖 𝐿 r = 𝐼 o , 𝑣 𝐶 r = 0 , and 𝑣 𝐶 b = 𝑉 𝐶 b 2 are initial conditions for this mode. As 𝑖 𝐿 r becomes 𝐼 o , synchronous switch is turned off under ZCS. Stored energy of inductor 𝐿 r and capacitor 𝐶 b is now transferred to load. ON state resistances of diodes and switches are neglected. The voltage and current equations for this mode are given as 𝑣 𝐶 b 𝑡 𝑡 6 𝐼 = o 𝐶 b 𝑡 𝑡 6 + 𝑉 𝐶 b 2 , 𝑖 𝐿 r 𝑡 𝑡 6 𝑉 = o 𝐿 r 𝑡 𝑡 6 + 𝐼 o . ( 1 6 ) This mode ends when 𝑖 𝐿 r becomes zero. The interval of this mode is given by 𝑡 6 7 = 𝐼 o 𝐿 r 𝑉 o . ( 1 7 )

Mode 8 t7-t8. Now the load current will flow through body diode of synchronous switch S 1 . During this mode, the converter operates like a conventional PWM buck converter until the switch S is turned on in the next switching cycle. In this mode, 𝑖 𝐷 1 = 𝐼 o . ( 1 8 )

2.3. Output Voltage

The output voltage can be specified by evaluating the energy from the supply, through the input resonant inductor 𝐿 r [27]. The output voltage is given by 𝑉 o = 𝑉 i 𝜏 1 2 𝑡 0 1 + 𝑡 1 2 + 𝑡 2 3 + 𝑡 4 5 + 𝑡 5 6 + 𝑡 6 7 = 𝑉 i 𝜏 1 2 𝐼 o 𝐿 r 𝑉 i + 1 𝜔 1 s i n 1 𝐶 r 𝐶 𝑒 + 1 1 𝜔 2 t a n 1 𝐼 𝐿 r m a x 𝐼 o 𝑉 𝐶 b 1 + 1 𝜔 3 t a n 1 𝑉 𝐶 r m a x 𝐼 o 𝑍 3 + 1 𝜔 2 t a n 1 𝐼 o 𝐼 𝐿 r 2 + 1 2 𝐼 o 𝐿 r 𝑉 o . ( 1 9 )

Since time intervals of Modes 1 and 7 have low value as compared to other terms in the above expression, the first and last terms are neglected for simplification.

Then, the voltage conversion ratio will be 𝑉 o 𝑉 i = 1 𝜏 1 𝜔 1 s i n 1 𝐶 r 𝐶 𝑒 + 1 1 𝜔 2 t a n 1 𝐼 𝐿 r m a x 𝐼 o 𝑉 𝐶 b 1 + 1 𝜔 3 t a n 1 𝑉 𝐶 r m a x 𝐼 o 𝑍 3 + 1 𝜔 2 t a n 1 𝐼 o 𝐼 𝐿 r 2 , ( 2 0 ) where 𝜏 = 1 / 𝑓 S , a n d 𝑓 S is the switching frequency.

From the expression, it can be seen that the voltage conversion ratio depends upon switching frequency rather than duty ratio.

3. Design Procedure

Design of conventional PWM converters has been well presented in literatures. Thus, it is more significant to focus on design procedures of the auxiliary circuit. The resonant inductor and resonant capacitor are the most important components when designing the auxiliary circuit. The proposed auxiliary resonant circuit provides soft-switching conditions for the main transistor. The following design procedure is developed considering procedures such as those presented previously in [57].

(1)Snubber inductor 𝐿 r is selected to permit its current to rise up to at most the maximum output current within 𝑡 r time periods, during the turn-on of the main transistor or the turnoff of the synchronous switch. In this case, from (1), 𝑉 i 𝐿 r 𝑡 r 𝐼 o m a x ( 2 1 ) can be written. Here, 𝑡 r is the rise time of the main transistor. These equations provide ZCS turn-on for the main transistor and ZVS turnoff for the body diode of synchronous switch.(2)Snubber capacitor 𝐶 r is selected to be discharged from 𝑉 i to zero with the maximum output current over at least the time period tf during the turnoff of the main transistor. For this state, according to (10) and (11), 1 𝐼 o m a x 𝑍 3 𝑉 i 𝑡 𝑓 . ( 2 2 ) Here, tf is the fall time of the main transistor and 𝑍 3 = 𝐿 r 𝐶 r . ( 2 3 ) (3)Buffer capacitor 𝐶 b is selected to be charged from zero up to at most a value decided before, such as half the input voltage. This capacitor takes on the energies that are stored in the snubber inductor during the turnoff of the synchronous switch and charge of the snubber capacitor. This energy balance can be defined as follows: 1 2 𝐶 r 𝑉 2 i + 1 2 𝐶 b 𝑉 2 𝐶 b 𝑚 = 1 2 𝐿 r 𝐼 2 o m a x . ( 2 4 ) The value of 𝐶 b is normally larger than the value of 𝐶 r . Consequently, the bigger the value of selected 𝐶 b is, the lower the value of 𝑉 𝐶 b m a x will be. Moreover, if the value of 𝐶 b increases, the voltage across the synchronous switch falls, but the time periods t23, t45, t56, and t67 during which the inductor energies are transferred to 𝐶 b or the load rise.

4. Converter Features

The features of the proposed soft-switching converter are briefly summarized as follows.

(1)All of the active and passive semiconductor devices are turned on and off under exact ZVS and/or ZCS.(2)The proposed converter has a simple structure, low cost, and ease of control.(3)The converter acts as a conventional PWM converter during most of the switching cycles.(4)The presented snubber cell can be easily applied to the other basic PWM DC-DC converters and to all switching converters.(5)The proposed converter has a larger total efficiency and a wider load range.(6)The main switch and the auxiliary switch are not subjected to additional voltage stresses. Current stress on the main switch is slightly higher, but current stress on the auxiliary switch is within safe limit.

5. Simulation and Experimental Results

A prototype of the proposed converter, as shown in Figure 1, has been built in the laboratory. The newly proposed converter operates with an input voltage 𝑉 i = 1 2 V , output voltage 𝑉 o = 3 . 3 V , load current of 11 A, and a switching frequency of 500 kHz. The converter is simulated using simulation software PSIM, version 6.0. The major parameters and components are given in Table 1.

tab1
Table 1: Components used in the proposed converter.

Figures 4(a)4(d) show the simulation results of the proposed converter and Figures 5(a)5(d) present the experimental results. All the waveforms except the efficiency curve represent a time period of one switching cycle, which is 2 microseconds in this case. The amplitudes are denoted in Figure 4 with each of their waveforms, respectively.

fig4
Figure 4: Simulated voltage and current waveforms: (a) main switch S : 𝑉 S , 𝐼 S ; (b) synchronous switch S 1 : 𝑉 S 1 , 𝐼 S 1 ; (c) diode 𝐷 S 1 and capacitor 𝐶 r ; (d) capacitor 𝐶 b and diode 𝐷 S 3 .
fig5
Figure 5: Experimental voltage and current waveforms: (a) main switch S : 𝑉 S , 𝐼 S (V: 5 V/div, I: 10 A/div, time: 0.2 μs/div); (b) synchronous switch S 1 : 𝑉 S 1 , 𝐼 S 1 (V: 5 V/div, I: 10 A/div, time: 0. 2 μs/div); (c) diode 𝐷 S 1 and capacitor 𝐶 r : 𝑉 𝐷 S 1 , 𝑉 𝐶 r (V: 5 V/div, I: 2 V/div, time: 0. 2 μs/div); (d) capacitor 𝐶 b and diode 𝐷 S 3 : 𝑉 𝐶 b , 𝑉 𝐷 S 3 (V: 5 V/div, I: 2 V/div, time: 0.2 μs/div).
5.1. Main Switch S

It is noted from Figures 4(a) and 5(a) that the main switch S is turned on under ZCS, and the body diode D1 of synchronous switch S 1 is turned off under ZVS. The main switch takes the load current and the charging current of the capacitors 𝐶 r and 𝐶 b . The inductor starts to transfer its stored energy to capacitors 𝐶 r and 𝐶 b during the turn-on period of main switch. The converter has not exceeded the voltage limits; however, the current stress is slightly higher for a very short period of time. The main switch also switches off under ZVS. The current and voltage wave shapes are identical to theoretical waveforms.

5.2. Synchronous Switch S 1

After the main switch is turned on under ZCS, the body diode of synchronous switch is turned off under ZVS, which can be observed from Figures 4(b) and 5(b). The synchronous switch is turned on under ZCS when the main switch is turned off under ZVS. After the turnoff of the main switch, both capacitors 𝐶 r and 𝐶 b are discharged. As soon as both capacitors are discharged near zero, the body diode of synchronous switch S 1 is turned on under ZVS. The converter has not exceeded the current limits; however, the voltage stress across the switch is slightly higher for a very short period of time. The synchronous switch operates within the safe limits, and it can be noted here that the conduction period of S 1 is more confining to the design values and it operates at a low power when compared to the other switches. The shapes of the figures are identified to confine much to the theoretical waveforms.

5.3. Schottky Diodes 𝐷 S 1 , 𝐷 S 2 , and 𝐷 S 3

The Schottky diodes work for a very short period to discharge the resonant capacitors 𝐶 r and 𝐶 b as can be observed from Figures 4(c), 4(d), 5(c), and 5(d). Moreover, it can be seen that the Schottky diodes 𝐷 S 1 , 𝐷 S 2 , and 𝐷 S 3 operate under soft-switching conditions. The Schottky diodes are turned on and off under ZVS. The conduction of Schottky diodes may cause a considerable drop in output voltage for low-power circuits, but due to the advancement in semiconductor techniques, Schottky diodes are also now available with a low-forward-voltage drop for high-frequency circuits.

Additionally, during the turn-on and turnoff of main switch S and synchronous switch S 1 , a slight overlap occurs between their own voltages and currents. Therefore, the switching losses are zero, but a little additional conduction loss takes place, and so the conduction losses dominate the total loss in the soft-switching converter.

Efficiency Curve
From Figure 6, it can be observed that the efficiency values of the soft-switching converter are relatively high with respect to those of the hard-switching converter. The efficiency values towards the minimum output power decrease naturally because the converter is designed for the maximum output current. At 70% output power, the overall efficiency of the proposed converter increases to about 96% from the value of 87% in its counterpart hard-switching converter. The high efficiency concludes the correctness of the design values.

862510.fig.006
Figure 6: Efficiency curve.

6. Conclusion

The concepts of ZVT used in medium and high power were implemented in synchronous buck converter, and it was shown that the switching losses in synchronous buck were eliminated. Besides, the main switch ZCS is turned on and ZVS is turned off. The synchronous switch is also turned on under ZCS and turned off under ZVS. Hence, switching losses are reduced and the newly proposed ZVT synchronous buck is highly efficient than the conventional converter. The additional voltage and current stresses on the main devices do not take place, and the auxiliary devices are subjected to allowable voltage and current values. Moreover, the converter has a simple structure, low cost, and ease of control. A prototype of a 3.3 V, 11 A, 500 kHz system was implemented to experimentally verify the improved performance.

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