730473.fig.008a
(a)
730473.fig.008b
(b)
730473.fig.008c
(c)
730473.fig.008d
(d)
730473.fig.008e
(e)
730473.fig.008f
(f)
Figure 8: Hardware layout and results. (a) Photograph of the prototype converter. (b) Switching pulse of switch, S1. (c) Transformer primary side voltage. (d) Transformer secondary side voltage. (e) Converter with buck output. (f) Plot of efficiency in step-up mode.