Telecommunications Engineering Department, Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang, Bangkok 10520, Thailand
Copyright © 2009 Montree Kumngern and Kobchai Dejhan. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Abstract
A new voltage-mode quadrature oscillator using two differential difference current conveyors (DDCCs), two grounded capacitors, and three grounded resistors is presented. The proposed oscillator provides the following advantages: the oscillation condition and oscillation frequency are orthogonally controlled; the oscillation
frequency is controlled through a single grounded resistor; the use of only grounded capacitors and resistors makes the proposed circuit ideal for IC implementation; low passive and active sensitivities. Simulation results verifying the theoretical analysis are also included.
1. Introduction
Second-generation current conveyors (CCIIs) have been found
very useful in many applications. This is attributed to their higher signal
bandwidths, greater linearity, and larger dynamic range than those of the operational-amplifiers (op-amps) based ones. Recently, Chiu et al. [1] proposed a
new current conveyor circuit called the differential difference current
conveyor (DDCC). The DDCC has the advantages of both the CCII and the
differential difference amplifier (DDA) (such as high input impedance and arithmetic
operation capability) [1].
A quadrature oscillator typically provides two sinusoids with
phase difference for a variety of applications, such as in
telecommunications for quadrature mixers, in single-sideband generators, in
direct-conversion receivers, or for measurement purposes in vector generators
or selective voltmeters [2, 3].
As a result, a number of circuits have been presented in technical literature [4–8].
In this paper, a new voltage-mode quadrature
oscillator based on DDCCs is presented. The proposed circuit employs two DDCCs,
two grounded capacitors, and three grounded resistors. The proposed circuit enjoys independent oscillation control
through a single grounded resistor and independent frequency control through
another single grounded resistor.
The use of grounded capacitors and resistors makes the proposed circuit
suitable for integrated circuit implementation [9]. The theoretical results are
verified by PSpice simulation.
2. Proposed Circuit
The electrical symbol of DDCC is
shown in Figure 1. It was proposed in 1996 by Chiu et al. [1], and it enjoys the advantages of
CCII and DDA such as larger signal bandwidth, greater linearity, wider dynamic
range, simple circuitry, low power consumption, and high input impedance [1].
The DDCC has three voltage input terminals:

, and
,
which have high input impedance. Terminal X is a low-impedance current input
terminal. There is a high-impedance current output terminal Z. The input-output
characteristics of the DDCC is described as [1]
(1) The CMOS realization of the DDCC
used in this paper for the quadrature oscillator circuit is shown in Figure 2.
Figure 1: Electrical symbol of DDCC.
Figure 2: The CMOS implementation of DDCC.
The
proposed quadrature oscillator is shown in Figure 3. It is composed of two DDCCs,
two grounded capacitors, and three grounded resistors. The characteristic
equation of the circuit can be expressed as
(2) The oscillation condition and oscillation frequency can be
obtained as
(3)
(4) It can be seen from (3)
and (4) that the oscillation condition can be adjusted by grounded resistor
or/and
and the oscillation frequency can be controlled by varying the grounded
resistor
without disturbing the oscillation condition. This means that the oscillation
frequency and oscillation condition are orthogonaly controlled. By using a JFET
to replace
, a voltage-controlled oscillator can be obtained [10]. From (4),
the passive sensitivities of proposed quadrature oscillator are low. From Figure 3, DDCC2 along with
and
form the lossless integrator.
Hence, the phase difference
between
and
is given by
(5) At
, (5) can be obtained as
, ensuring that the currents
and
are in quadrature.
Figure 3: Proposed voltage-mode quadrature oscillator.
3. Nonideal Effects
To consider the nonideal effect of
a DDCC, taking the nonidealities of the DDCCs into account, the relationship
of the terminal voltages and currents can be rewritten as [11]
(6) where
and
denotes the voltage tracking error from
terminal to
terminal of the kth DDCC,
and
denotes the voltage tracking error from
terminal to
terminal of the kth DDCC,
and
denotes the voltage tracking error from
terminal to
terminal of the kth DDCC, and
and
denotes the output current tracking error of the kth DDCC. The
characteristic equation of Figure 3 becomes
(7) The modified oscillation
condition and oscillation frequency are
(8)
(9) From (7) and (8), the tracking errors slightly change the oscillation condition and oscillation frequency. However, the oscillation condition and oscillation
frequency still can be orthogonally controllable.
4. Simulation Results
To verify the theoretical prediction of the proposed circuit, Figure
3 has been simulated using PSpice simulation program. The DDCC in Figure 2 was
simulated using the 0.5
m MIETEC as tabulated in Table 1 [12]. The
transistor aspect ratios of DDCC are listed in Table 2 [12], and the supply
voltages were
= 2.5 V. The biasing voltage
was taken as −1.7 V. The quadrature oscillator was designed with
=
= 50 pF,
=
= 5 k
, and
= 5.2 k
for the
oscillation frequency of
= 649 kHz that where
was varied with
by (3) to ensure the oscillator will start. The
simulation results are shown in Figure 4. In this figure, the oscillation frequency of
640 kHz
is obtained. The oscillation frequency is 640 kHz instead of 649 kHz owing the
effect described in Section 3. According to (9), this drop-off would be caused
by voltage and current tracking errors. Figure 5 shows the simulated frequency
spectrums of
and
in Figure 4. The result of the
total harmonic distortion analysis is 1.02%. Figure 6 shows the simulation results of the proposed quadrature
oscillator in Figure 3 by varying the values of the resistor
with
=
= 50 pF,
= 5 k
, and
= 5.2 k
. The nonidealities may be due to the ignored
tracking errors of the DDCC.
Table 1: CMOS
model used in simulation.
Table 2: Transistor
aspect ratios of the used DDCC.
Figure 4: The simulated quadrature output waveforms.
Figure 5: The simulated frequency spectrum of

and

.
Figure 6: Simulated results of the oscillation frequency.
5. Conclusions
In this paper, a new DDCC-based voltage-mode quadrature oscillator
circuit has been presented. The proposed circuit employs two DDCCs, two
grounded capacitors, and three grounded resistors. The proposed circuit enjoys
independent oscillation control through a single grounded resistor and
independent frequency control through another single grounded resistor. The use
of grounded capacitors makes the circuit attractive for integration, and the use
of grounded resistor for independent control of the oscillation frequency makes
the circuit attractive for the realization of voltage-controlled oscillators.
The active and passive sensitivities are no more than unity. Simulation
results, which confirm the theoretical analysis, are obtained.
Acknowledgment
The authors would like to thank the anonymous
reviewers for their valuable comments.
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