Taylor Expansion of Surface Potential in MOSFET: Application to Pao-Sah Integral

Figure 2

Upper 𝑢_Up and lower 𝑢_Low limits of the reduced surface potential  versus gate voltage 𝑉𝑔. (a) equation (20) and (b) equation (22). 𝑁_𝐴=10¹⁷cm⁻³ and 𝑡_ox=10 nm. 𝑉𝑔=𝑉_𝑇 when (a) crosses the line 𝑢_Low=−𝑢_𝑏.