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Active and Passive Electronic Components
Volume 2011 (2011), Article ID 274394, 8 pages
http://dx.doi.org/10.1155/2011/274394
Research Article

New Canonic Active RC Sinusoidal Oscillator Circuits Using Second-Generation Current Conveyors with Application as a Wide-Frequency Digitally Controlled Sinusoid Generator

136-B, J and K Pocket, Dilshad Garden, Delhi, India
2Division of Electronics and Communications, Netaji Subhas Institute of Technology, University of Delhi, Delhi, India

Received 17 January 2011; Revised 22 March 2011; Accepted 29 April 2011

Academic Editor: Ali Umit Keskin

Copyright © 2011 Abhirup Lahiri. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

This paper reports two new circuit topologies using second-generation current conveyors (CCIIs) for realizing variable frequency sinusoidal oscillators with minimum passive components. The proposed topologies in this paper provide new realizations of resistance-controlled and capacitor-controlled variable frequency oscillators (VFOs) using only four passive components. The first topology employs three CCIIs, while the second topology employs two CCIIs. The second topology provides an advantageous feature of frequency tuning through two grounded elements. Application of the proposed circuits as a wide-frequency range digitally controlled sinusoid generator is exhibited wherein the digital frequency control has been enabled by replacing both the capacitors by two identical variable binary capacitor banks tunable by means of the same binary code. SPICE simulations of the CMOS implementation of the oscillators using 0.35 μm TSMC CMOS technology parameters and bipolar implementation of the oscillators using process parameters for NR200N-2X (NPN) and PR200N-2X (PNP) of bipolar arrays ALA400-CBIC-R have validated their workability. One of the oscillators (with CMOS implementation) is exemplified as a digitally controlled sinusoid generator with frequency generation from 25 kHz to 6.36 MHz, achieved by switching capacitors and with power consumption of 7 mW in the entire operating frequency range.

1. Introduction

Sinusoidal oscillators are very important analog circuits and find numerous applications in communication, control systems, signal processing, instrumentation, and measurement systems (see [1] and references cited therein). Since the advent of current conveyors, namely, the first-generation current conveyor (CCI) and the second-generation current conveyor (CCII) by Sedra and Smith in [2, 3], considerable attention has been given to the realizations of active RC sinusoidal oscillators using current conveyors (CCs). Several classes of CC-based sinusoidal oscillators have evolved depending on the number of passive components employed and the tuning laws. Oscillators using four passive components (including two resistors and two capacitors) are classified as canonic (or minimum passive component) oscillators and are suitable for realizing variable frequency oscillators (VFOs) [4]. As pointed in [4], two of the most important tuning laws of the condition of oscillation (CO) and the frequency of oscillation (FO) for realizing canonic variable frequency oscillators (VFOs) are as follows.

Type1:
CO:𝐶1=𝐶2,(1)FO:𝑓𝑜=12𝜋1𝐶1𝐶2𝑅1𝑅2.(2)

Type2:
CO:𝑅1=𝑅2,(3)FO:𝑓𝑜=12𝜋1𝐶1𝐶2𝑅1𝑅2.(4) It is clear from (1)–(4) that Type1 oscillators can provide frequency tuning by means of resistors 𝑅1 and 𝑅2 and Type2 oscillators can provide frequency tuning by means of capacitors 𝐶1 and 𝐶2. Thus, both types of circuits are suitable to be used as VFOs. Since realizations of both voltage-controlled resistors and capacitors are known, both Type1 and Type2 circuits can be used as voltage-controlled oscillators (VCOs). Detailed references of the known oscillator circuits based on Type1 or Type2 tuning laws are provided in [4]. A very popular circuit for realizing VFO based on Type1 tuning law is reported in [5] (and its equivalent current-feedback op-amp-based version is reported in [6]). A reference apparently skipped in [4], that is [7], also discusses a modified variant of the circuit in [4]. Although not stated in [4], all the circuits in [47] (which are based on Type1 tuning law) can be transformed into oscillators with Type2 tuning law by simply using RC-CR transformation, that is, replace each resistor by capacitor and vice versa. The circuits in [811] also report minimum passive component CFOA oscillators with tuning laws other than Type1 and Type2 and with nonindependent CO and FO tuning laws. It should be pointed that the circuit in [10] is also minimum in terms of the number of active components. But such tuning laws (as in [8, 10]) are not very desirable as there is no independent term in the FO, and thus independent tuning of FO is impossible without simultaneously readjusting the CO. In a very recent communication [12], Fongsamut et al. proposed both Type1 and Type2 oscillators using two-X two-Z CCII and creating very compact realization of the oscillators.

This paper reports two new topologies for oscillators using two/three CCIIs, four passive components, and which can realize oscillators with both Type1 and Type2 tuning laws (using RC-CR transformation), thereby adding to the current literature on active RC oscillators. The topologies can also provide quadrature current/voltage outputs because of the use of lossless integrators/differentiators. The resulting circuits are suitable for monolithic integration since both bipolar and CMOS implementations of CCII (both positive and negative) are available. CCII+ is available as a commercial IC (e.g., AD844 [13]), and single current output CCII− can also be created using two CCII+ ICs [14], and this makes bread-board implementation of the circuit solutions using CCII simpler. An important advantage of one of the proposed topologies (and derived circuits) over those in [5, 6, 8, 12] is that both the frequency control elements (either resistors or capacitors) are grounded and which allows very easy electronic tunability (dual-element frequency control) by both analog and digital means. As an example, Type1 oscillators derived from this topology can have voltage-controlled FO by simply implementing resistors through MOSFETs working in triode region. Nonideal analysis of the circuit is briefed and sensitivity analysis is provided. The aim of the paper is also to provide application of the proposed circuits as a digitally controlled wide-frequency sinusoid generator. As an application of the circuit where FO is digitally controlled, the two grounded capacitors (and/or the two resistors) can be replaced by binary weighted programmable element banks controllable by external digital codes and thereby enabling variable frequency generation. SPICE simulations of the CMOS implementation of the oscillator using 0.35 μm TSMC CMOS technology parameters and bipolar implementation of the oscillators using process parameters for NR200N-2X (NPN) and PR200N-2X (PNP) of bipolar arrays ALA400-CBIC-R [15] have validated their workability. In the example, the circuit can be easily digitally tuned from 25 kHz to 6.36 MHz, afrequency range covering many clock generators (including crystal oscillators).

2. Proposed Circuit Topologies and Derived Oscillators

The first proposed circuit topology is shown in Figure 1(a). CCII is ideally characterized by the following equations: 𝑉𝑦=𝑉𝑥,𝐼𝑦=0,𝐼𝑧+=𝐼𝑧=𝐼𝑥,(5) where the directions of the currents are in accordance with the network convention that all currents are flowing into the terminals. Using (5) and doing routine circuit analysis yields the following characteristic equation (CE) for this autonomous circuit topology: 𝑍2𝑍4+𝑍1𝑍3+𝑍2𝑍3=𝑍4𝑍3.(6) The first oscillator circuit, shown in Figure 1(b), is derived by choosing the impedances as 𝑍1=1/𝑠𝐶1, 𝑍2=𝑅2, 𝑍3=1/𝑠𝐶3, and 𝑍4=𝑅4. With these impedances, (6) can be rewritten as 𝑠2𝐶1𝐶3𝑅2𝑅4+𝑠𝐶1𝑅2𝑅4+1=0.(7) It is evident from (7) that the CO and the FO are given as CO:𝑅2𝑅4,(8)FO:𝑓𝑜=12𝜋1𝐶1𝐶3𝑅2𝑅4.(9) It is clear from (8) and (9) that the FO can be independently varied (i.e., without disturbing the CO) via capacitors 𝐶1 and 𝐶3. The second oscillator circuit, shown in Figure 1(c), is derived by simply applying RC-CR transformation on the first circuit, that is, choosing the impedances as 𝑍1=𝑅1, 𝑍2=1/𝑠𝐶2, 𝑍3=𝑅3, and 𝑍4=1/𝑠𝐶4; (6) can be rewritten as 𝑠2𝐶2𝐶4𝑅1𝑅3+𝑠𝑅3𝐶4𝐶2+1=0.(10) It is evident from (10) that the CO and the FO are given as CO:𝐶4𝐶2,(11)FO:𝑓𝑜=12𝜋1𝐶2𝐶4𝑅1𝑅3.(12) It is clear from (11) and (12) that the FO can be independently varied (i.e., without disturbing the CO) via resistors 𝑅1 and 𝑅3, leading to resistance-controlled VFO. The circuits in Figures 1(b) and 1(c) are suitable for quadrature current output generation owing to the use of lossless integrators/differentiators. The currents flowing in the 𝑥 terminals of first and second CCIIs for both the circuits are quadrature in nature. These currents can be sensed out for explicit utilization by means of additional 𝑧 terminals in the CCII.

fig1
Figure 1: (a) First proposed circuit topology, (b) Type2 oscillator, and (c) Type1 oscillator.

The second proposed topology is shown in Figure 2(a) and employs two CCIIs. Using (5) and doing routine circuit analysis yields the following ideal CE for this autonomous circuit topology: 𝑍2𝑍4+𝑍1𝑍2+𝑍1𝑍3=𝑍1𝑍4.(13) The first oscillator circuit, shown in Figure 2(b), is derived by choosing the impedances as 𝑍1=1/𝑠𝐶1, 𝑍2=𝑅2, 𝑍3=1/𝑠𝐶3, and 𝑍4=𝑅4. With these impedances, (13) can be rewritten as 𝑠2𝐶1𝐶3𝑅2𝑅4+𝑠𝐶3𝑅2𝑅4+1=0.(14) It is evident from (14) that the CO and the FO are given same as in (8) and (9), respectively—which is indicative of Type2 tuning law. The second oscillator circuit, shown in Figure 2(c), is derived by simply applying RC-CR transformation on the circuit in Figure 2(b), that is, choosing the impedances as 𝑍1=𝑅1, 𝑍2=1/𝑠𝐶2, 𝑍3=𝑅3, and 𝑍4=1/𝑠𝐶4; (13) can be rewritten as 𝑠2𝐶2𝐶4𝑅1𝑅3+𝑠𝑅1𝐶4𝐶2+1=0.(15) It is evident from (15) that the CO and the FO are the same as (11) and (12), respectively, which is indicative of Type1 tuning law. The circuits in Figures 2(b) and 2(c) are also suitable for quadrature voltage generation owing to the use of lossless integrators/differentiators. The voltages at 𝑥 and 𝑧 terminals of the first CCII for both the circuits are quadrature in nature and given as follows: For Figure 2(b), 𝑉𝑧=1𝑗𝜔𝑜𝐶3𝑅2𝑉𝑥.(16)for Figure 2(c), 𝑉𝑧=𝑗𝜔𝑜𝐶3𝑅3𝑉𝑥.(17)

fig2
Figure 2: (a) Second proposed circuit topology, (b) Type2 oscillator, and (c) Type1 oscillator.

3. Nonideal Analysis

Considering the nonidealities that arise from the actual physical implementation of the circuit, the characterizing equation of the CCII in (1) is rewritten as 𝑉𝑦=𝛼𝑉𝑥,𝐼𝑦||𝐼=0,𝑧±||=𝛽𝐼𝑥,(18) where 𝛼 represents the voltage gain from 𝑦 to 𝑥 terminal, and 𝛽 represents the current gain from 𝑥 to 𝑧. According to [16, 17], these gains can be modeled as first-order transfer functions 𝛼𝛼=01+𝑠/𝜔𝛼𝛽,𝛽=01+𝑠/𝜔𝛽,(19) where 𝛼0 and 𝛽0 represent the DC transfer gains. We consider the operating frequencies much less than those of the angular pole frequencies, 𝜔𝛼 and 𝜔𝛽, and hence, we can approximate 𝛼𝛼0 and 𝛽𝛽0. Apart from this, there exists a nonzero parasitic resistance at terminal 𝑥 which comes in series with the external impedance at 𝑥 terminal. We analyze the nonideal behavior of the first topology here, and the nonideal analysis of second topology can also be done similarly (arriving at similar conclusions). For circuit in Figure 1(b), 𝑅𝑥 for the second and third CCIIs is absorbed into external resistors, 𝑅2 and 𝑅3, respectively (this requires external resistors to be of much larger value than 𝑅𝑥, so that frequency deviation from the ideal value in (9) and (12) can be minimized). But for the first CCII, 𝑅𝑥 comes in series with the external capacitor. To alleviate its affect, the operating angular FO should be chosen such that 𝜔𝑜1/𝑅𝑥1𝐶3. Similarly, for circuit in Figure 1(c), 𝑅𝑥 for the first CCII is absorbed into external resistor 𝑅3, and the operating angular FO should be chosen such that 𝜔𝑜min(1/𝑅𝑥2𝐶2,1/𝑅𝑥3𝐶4). Considering the active element nonidealities as indicated in (18), the CE in (6) is modified to 𝛼1𝛽1𝑍2𝑍4+𝛼3𝛽3𝑍1𝑍3+𝑍2𝑍3=𝑍4𝑍3𝛽21+𝛽221.(20)

The modified CO and FO for Type2 circuit, shown in Figure 2(b), are given as CO:𝛼3𝛽3𝑅2𝑅4𝛽21+𝛽221,(21)FO:𝑓𝑜=12𝜋𝛼3𝛽3𝛼1𝛽1𝐶1𝐶3𝑅2𝑅4.(22) Equation (21) and (22) provide very useful results. It is clear that even in the nonideal case, the FO can be independently tuned via capacitors 𝐶1 and 𝐶3. Also, since voltage and current gains appear both in the numerator and denominator in the FO, their effect on FO is minimized (their effect on FO can be nullified if 𝛼3𝛽3=𝛼1𝛽1). Similarly, the modified CO and FO for Type1 circuit, shown in Figure 2(c), are given as CO:𝐶4𝐶2𝛽21+𝛽221,(23)FO:𝑓𝑜=12𝜋𝛼1𝛽1𝛼3𝛽3𝐶2𝐶4𝑅1𝑅3.(24) It is clear from (23) and (24) that even in the nonideal case, the FO can be independently tuned via resistors 𝑅1 and 𝑅3, and the effect of voltage and current gains on the FO can be nullified if 𝛼3𝛽3=𝛼1𝛽1. The sensitivity analyses from (17) and (19), for both the oscillators, indicate that |||𝑆𝑓𝑜𝛼1,𝛽1,𝛼3,𝛽3,𝑅𝑖,𝐶𝑗|||=12where𝑖,𝑗=1,2.(25)

4. Simulation Results

The proposed circuits have been verified using SPICE simulations. Both the CMOS implementation of the oscillator using 0.35 μm TSMC CMOS technology parameters and the bipolar implementation using process parameters for NR200N-2X (NPN) and PR200N-2X (PNP) of bipolar arrays ALA400-CBIC-R from AT & T [15] have been worked. This section provides some design examples that have been implemented. The Type2 oscillator in Figure 1(b) is designed using bipolar implementation of the CCII as shown in Figure 3(a), with ±3 V supply and passive components values: 𝐶1=𝐶3=600 pF, 𝑅2=10 kΩ, and 𝑅4=11.8 kΩ. The startup of oscillations, the steady-state waveform, and magnitude spectrum of the voltage signal at terminal 𝑦 of third CCII are shown in Figures 4(a), 4(b), and 4(c), respectively. The total harmonic distortion (THD) of the generated voltage signal is 0.72%, and the simulated FO is 24.578 kHz as compared to the theoretical FO of 24.419 kHz. Similarly, the Type1 oscillator in Figure 1(c) is designed using bipolar implementation and using these passive components values: 𝑅1=𝑅3=10 kΩ, 𝐶4=500 pF, and 𝐶2=600 pF. The startup of oscillations, the steady-state waveform, and magnitude spectrum of the voltage signal at terminal 𝑦 of third CCII are shown in Figures 5(a), 5(b), and 5(c), respectively. The total harmonic distortion (THD) of the generated voltage signal is 0.94% and the simulated FO is 29.338 kHz as compared to the theoretical FO of 29.057 kHz. It should be noted that no external auxiliary amplitude control circuitry is used to stabilize the oscillation amplitude, and the amplitude is inherently limited due to the nonlinearity of the active device. Alternatively, automatic amplitude control loops can be employed to achieve tighter THD specification even with larger startup margin. The circuit in Figure 2(b) is designed using a possible MOSFET implementation of CCII, as shown in Figure 3(b), with ±2.5 V supply. The aspect ratios of the transistors are indicated in Table 1 and the biasing current 𝐼𝐵=100 uA. With the passive component values chosen as 𝑅2=10 kΩ, 𝑅1=9.8 kΩ, and 𝐶1=𝐶2=500 pF, the startup of oscillations and the steady-state waveforms for both the quadrature voltage signals are shown in Figures 6(a) and 6(b), respectively (where 𝑉𝑜1 and 𝑉𝑜2 are the voltages at 𝑥 and 𝑧, terminal of the first CCII). The observed frequency of 149 kHz is in close correspondence with the theoretical value of 159.1 kHz, and the THD at both the outputs is less than 0.6%. For digitally controlled frequency generation, both the capacitors 𝐶1 and 𝐶3 are replaced by binary-weighted programmable capacitors banks (shown in Figure 7) controllable by external digital codes. The capacitor bank consists of eight binary-weighted capacitors with the minimum capacitor value of 2.5 pF (corresponding to LSB), and an eight-bit binary code (BC) [B0   B1⋯B7] is used to control the effective capacitance. The BC can take any value from [10000000] to [11111111], that is, the minimum capacitance of the bank is 2.5 pF, and the maximum capacitance is 637.5 pF. The FO tuning curve with changing BC is shown in Figure 8(a), where the X-axis represents the decimal equivalent of the BC. The FO tuning achieved by this capacitor bank is from 25 kHz to 6.36 MHz, and the power consumption does not exceed 7 mW for the entire frequency range. The variation of the amplitude of oscillation (at the 𝑥 terminal of the first CCII) and the THD with changing BC (i.e., changing FO) is shown in Figures 8(b) and 8(c), respectively.

tab1
Table 1: Transistors widths for CCII.
fig3
Figure 3: Possible (a) bipolar implementation of dual-output CCII− and (b) MOSFET implementation of complimentary output CCII.
fig4
Figure 4: Oscillator in Figure 1(b): (a) startup of oscillations, (b) steady-state waveform, and (c) magnitude spectrum.
fig5
Figure 5: Oscillator in Figure 1(c): (a) startup of oscillations, (b) steady-state waveform, and (c) magnitude spectrum.
fig6
Figure 6: Quadrature oscillator in Figure 2(b): (a) startup of oscillations and (b) steady-state waveforms.
274394.fig.007
Figure 7: Binary-weighted programmable capacitor bank.
fig8
Figure 8: (a) FO tuning, (b) amplitude variation, and (c) THD variation, with changing BC.

5. Concluding Remarks

This paper reports two new CCII-based oscillator topologies that add to the current catalog of minimum passive component active-RC oscillators. A new topology with grounded frequency tuning elements is presented, and oscillators with frequency control via both resistor and capacitor are realized using the proposed topologies. SPICE simulation results using both the bipolar and CMOS implementation of the circuits have verified their workability. Application of the proposed circuit as a wide-frequency range digitally controlled sinusoid generator is also demonstrated.

Acknowledgments

The author would like to thank the anonymous reviewers for useful suggestions and comments, which helped to improve the paper substantially. The author is also grateful to Dr. Ali Umit Keskin, the associate editor of Active and Passive Electronic Components Journal, for enabling the prompt review of the paper. Part of this work was done while the author was with the Division of Electronics and Communications, Netaji Subhas Institute of Technology, University of Delhi, Delhi, India.

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