Proposal of High-Temperature-Operation Tolerant SOI MOSFET and Preliminary Study on Device Performance Evaluation

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</svg>V for various temperature conditions. The device has a 40-nm long <i>p</i>-type region (<i>L<sub>p</sub></i>).  The device has 1-nm-thick local-thin Si regions at both sides of <i>n</i>-type Si body.</table>

Active and Passive Electronic Components

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Figure 7

Figure 7: Proposal of High-Temperature-Operation Tolerant SOI MOSFET and Preliminary Study on Device Performance Evaluation 