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Active and Passive Electronic Components
Volume 2011 (2011), Article ID 929507, 7 pages
VM and CM Universal Filters Based on Single DVCCTA
1Department of Electronics and Communications Engineering, Delhi Technological University, Delhi 110042, India
2Department of Electronics Engineering, Indian School of Mines, Dhanbad, Jharkhand 826004, India
Received 15 January 2011; Revised 23 February 2011; Accepted 24 February 2011
Academic Editor: Ching Liang Dai
Copyright © 2011 Neeta Pandey and Sajal K. Paul. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
A universal voltage-mode filter (VM) and a current-mode filter (CM) based on recently proposed active building block, namely, differential voltage current conveyor transconductance amplifier (DVCCTA) are proposed. Both the circuits use a single DVCCTA, two capacitors, and a single resistor. The filters enjoy low-sensitivity performance and low component spread and exhibit electronic tunability of filter parameters via bias currents of DVCCTA. SPICE simulation using 0.25 μm TSMC CMOS technology parameters is included to show the workability of the proposed circuits.
The current mode approach for analog signal processing circuits and systems has emerged as an alternate method besides the traditional voltage-mode circuits . The current mode active elements are appropriate to operate with signals in current, voltage, or mixed mode and are gaining acceptance as building blocks in high-performance circuit designs. A number of current mode active elements such as operational transconductance amplifier (OTA) , current conveyors (CC) [3–5], differential voltage current conveyor (DVCC) , differential difference current conveyor (DDCC) , and current feedback operational amplifier (CFOA)  are available in the literature.
Recently there is report of some new analog building blocks, such as current-conveyor transconductance amplifier (CCTA) [9, 10], current controlled current conveyor transconductance amplifier (CCCCTA) , current difference transconductance amplifier (CDTA) , current controlled current difference transconductance amplifier (CCCDTA) , differential voltage current conveyor transconductance amplifier (DVCCTA) , and differential voltage current controlled conveyor transconductance amplifier DVCCCTA , which may be obtained by cascading of current mode building blocks with TA analog building blocks in monolithic chip for compact implementation of signal processing circuits and systems. It is well known that DVCC has some advantages [6, 16, 17], specially for applications demanding differential and floating inputs, over CCII or CCCII owing to two high input impedance terminals for DVCC compared to one high input impedance terminal for CCII or CCCII. However, DVCC does not have a powerful inbuilt tuning property in contrast to CCCII.
This paper presents a universal voltage-mode filter and a universal current mode filter based on recently proposed active building block, namely, differential voltage current conveyor transconductance amplifier (DVCCTA)  which has DVCC  as input block and is followed by transconductance amplifier (TA). The DVCCTA has all the good properties of CCTA or CCCCTA including the possibility of inbuilt tuning of the parameters of the signal processing circuits to be implemented and also all the versatile and special properties of DVCC such as easy implementation of differential and floating input circuits [6, 16, 17]. The proposed circuits have been implemented using 0.25 μm TSMC CMOS technology and are validated through SPICE simulations for their functionality.
2. Circuit Description
The DVCCTA is based on DVCC  and consists of differential amplifier, current mirrors, and transconductance amplifier (TA). The port relationships of the DVCCTA as shown in Figure 1 can be characterized by the following matrix: where is transconductance of the DVCCTA.
The CMOS-based internal circuit of DVCCTA in CMOS is depicted in Figure 2 and is based on internal circuit of DVCC  which is followed by a transconductance amplifier. The value of is obtained as which can be adjusted by bias current . The TSMC 0.25 μm CMOS process model parameters and supply voltages of and are used. The aspect ratio of various transistors for DVCC is given in Table 1.
2.2. Universal Voltage-Mode Filter
In this section, a universal voltage-mode (VM) filter is proposed. It uses a single DVCCTA, two capacitors, and a grounded resistor. The proposed universal VM filter is shown in Figure 3. The analysis of circuit yields the output voltages at two nodes as follows where
Table 2 shows the availability of each filter response and corresponding selection of input voltages , , and . Thus the proposed structure is a three-input and two output voltage-mode filter. The responses are characterized by pole frequency (), bandwidth (), and quality factor () as follows:
It may be noted that the value of can easily be varied by bias currents . The resistance being a grounded one may easily be implemented as a variable resistance using only two MOSs  or replacing DVCCTA along with resistor by DVCCCTA . Equation (5) reveals that for high-pass and band-pass responses, the pole frequency () and quality factor () can be adjusted by , that is, by bias current () of DVCCTA, without disturbing . The and are orthogonally adjustable with simultaneous adjustment of and such that the product remains constant, and the quotient varies and vice versa. Equation (5) also indicates that high values of Q factor will be obtained from moderate values of ratios of passive components, that is, from low component spread . These ratios can be chosen as . Hence, the spread of the component values becomes of the order of. This feature of the filter related to the component spread allows the realization of high values more accurately compared to the topologies where the spread of passive components becomes or . It can also be easily evaluated to show that the sensitivities of pole and pole are within unity in magnitude. Thus, the proposed structures can be classified as insensitive.
A detailed study of the available similar type of single active element- (such as CCCTA, DBTA, and DVCCCTA) based voltage-mode filters and the proposed one is given in Table 3. It reveals that the topology in  uses excessive number of passive components whereas the proposed topology uses one extra passive component, namely, resistor (R) in comparison to structures in [11, 15]; however this resistor (R) may be eliminated as discussed above. Structures in [15, 18] do not provide for all standard universal filter functions. Topology in  needs input signal , , and ; hence, there is a requirement of additional circuits. Thus the proposed structure possesses all the advantageous features as tabulated in Table 3 without any additional components, rather passive components used may be reduced to 2 by eliminating resistor (R) at terminal with the use of DVCCCTA instead of DVCCTA.
To verify the functionality of the proposed single DVCCTA-based voltage-mode filter, SPICE simulations have been carried out using TSMC 0.25 μm CMOS process model parameters and supply voltages of and . The aspect ratio of various transistors is given in Table 1. The filter is designed for a pole frequency of = 1.59 MHz, , the component values are found to be , , and bias current of DVCCTA equals 100 A. Figure 4(a) shows the simulation results for low-pass () and high-pass () filter responses which are available simultaneously for = = , = 0. Figure 4(b) shows the simulation results for high pass () and band-pass () filter responses which are available simultaneously for = , = = 0. Notch and all pass responses are shown in Figures 4(c) and 4(d) with = = = and R = 1 kΩ and 2 kΩ, respectively.
2.3. MISO Current Mode Universal Filter
A multiple-input single-output (MISO) universal current mode (CM) filter is proposed in this section which is obtained by grounding all voltage inputs in Figure 3 and exciting them with current inputs as shown in Figure 5. Here, an extra Z-terminal is added to obtain at high impedance. It employs a single DVCCTA, two grounded capacitors, and a grounded resistor. Analysis of this circuit gives the output current as follows: where
Table 4 shows the availability of each filter response and corresponding selection of input currents , and . Thus, the proposed structure is a three-input single output current mode filter. It may be noted that there is no component matching constraint for obtaining any filter response. The filter parameters are the same as given in (5). The grounded resistance (R) may easily be implemented as variable one using only two MOSs  for full electronic control of filter parameters. The , and can be orthogonally adjusted the way discussed in Section 2.2.
A detailed study of the available similar type of active element (such as CCCCTA, CCCDTA, and CC-CCTA) based CM filters and the proposed one is given in Table 5. It reveals that although the proposed structure needs one extra resistor, the reported structures in [11, 13, 19, 20] suffer from one or more features. In addition some active elements are required to sense current [13, 20]. Thus structures in [11, 13, 19, 20] will require some extra circuits to compensate the short comings in their features in comparison to the proposed one.
The proposed universal MISO current mode filter is validated through SPICE simulations. The circuit of Figure 5 for a pole frequency of = 1.59 MHz, Q = 1 has been designed with the component values of C = = = 100 pF, R = 1 kΩ and bias current of DVCCTA equals to 100 A. The low-pass, band-pass, high-pass, notch, and all pass responses are shown in Figure 6 which show close agreement with the theoretical formation.
The orthogonal adjustment of with is depicted in Figure 7. This is designed for a constant value of = 1 with = = 100 pF for different values of as given in Table 6. Figure 8 shows orthogonal adjustment of with = 1.59 MHz. The values of for constant value of as obtained with = = 100 pF and other component values are listed in Table 7.
The simulations have also been carried out to study the limits on tunability. Figure 9 shows the tuning of pole frequency () of the band-pass filter with bias current () (i.e., with ) for = = 100 pF and R = 1 kΩ. It may be noted that the tuning of pole frequency () is adequate up to about 200 A and then the tuning is slow till 450 A. The decreases in pole frequency for larger bias currents than 450 A are due to transistors (, ) entering in linear region of operation from saturation region.
New universal voltage-mode and current-mode filters using a single DVCCTA have been presented. The circuits use one DVCCTA, two capacitors, and a resistor for realization. The resistor being grounded may easily be implemented as a variable one using only two MOSs . The resistor may be eliminated by replacing DVCCTA with DVCCCTA in the case of VM filter. The simulation results verify the theory. The salient features of the proposed circuits are as follows: they employ a single DVCCTA, low sensitivity performance, electronic tunability of both and and and , high output impedance for CM filter, which are suitable for cascading, and low component spread for high- application.
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