VM and CM Universal Filters Based on Single DVCCTA

Abstract

A universal voltage-mode filter (VM) and a current-mode filter (CM) based on recently proposed active building block, namely, differential voltage current conveyor transconductance amplifier (DVCCTA) are proposed. Both the circuits use a single DVCCTA, two capacitors, and a single resistor. The filters enjoy low-sensitivity performance and low component spread and exhibit electronic tunability of filter parameters via bias currents of DVCCTA. SPICE simulation using 0.25 μm TSMC CMOS technology parameters is included to show the workability of the proposed circuits.

1. Introduction

The current mode approach for analog signal processing circuits and systems has emerged as an alternate method besides the traditional voltage-mode circuits [1]. The current mode active elements are appropriate to operate with signals in current, voltage, or mixed mode and are gaining acceptance as building blocks in high-performance circuit designs. A number of current mode active elements such as operational transconductance amplifier (OTA) [2], current conveyors (CC) [3–5], differential voltage current conveyor (DVCC) [6], differential difference current conveyor (DDCC) [7], and current feedback operational amplifier (CFOA) [8] are available in the literature.

Recently there is report of some new analog building blocks, such as current-conveyor transconductance amplifier (CCTA) [9, 10], current controlled current conveyor transconductance amplifier (CCCCTA) [11], current difference transconductance amplifier (CDTA) [12], current controlled current difference transconductance amplifier (CCCDTA) [13], differential voltage current conveyor transconductance amplifier (DVCCTA) [14], and differential voltage current controlled conveyor transconductance amplifier DVCCCTA [15], which may be obtained by cascading of current mode building blocks with TA analog building blocks in monolithic chip for compact implementation of signal processing circuits and systems. It is well known that DVCC has some advantages [6, 16, 17], specially for applications demanding differential and floating inputs, over CCII or CCCII owing to two high input impedance terminals for DVCC compared to one high input impedance terminal for CCII or CCCII. However, DVCC does not have a powerful inbuilt tuning property in contrast to CCCII.

This paper presents a universal voltage-mode filter and a universal current mode filter based on recently proposed active building block, namely, differential voltage current conveyor transconductance amplifier (DVCCTA) [15] which has DVCC [6] as input block and is followed by transconductance amplifier (TA). The DVCCTA has all the good properties of CCTA or CCCCTA including the possibility of inbuilt tuning of the parameters of the signal processing circuits to be implemented and also all the versatile and special properties of DVCC such as easy implementation of differential and floating input circuits [6, 16, 17]. The proposed circuits have been implemented using 0.25 μm TSMC CMOS technology and are validated through SPICE simulations for their functionality.

2. Circuit Description

2.1. DVCCTA

The DVCCTA is based on DVCC [6] and consists of differential amplifier, current mirrors, and transconductance amplifier (TA). The port relationships of the DVCCTA as shown in Figure 1 can be characterized by the following matrix: ⎡⎢⎢⎢⎢⎢⎢⎣𝐼^𝑌1𝐼_𝑌2𝑉_𝑋𝐼_𝑍+𝐼_𝑍−𝐼_𝑂−⎤⎥⎥⎥⎥⎥⎥⎦=⎡⎢⎢⎢⎢⎢⎢⎣001000−000001−000101−00000𝑔_𝑚000000000000⎤⎥⎥⎥⎥⎥⎥⎦⎡⎢⎢⎢⎢⎢⎢⎣𝑉^𝑌1𝑉_𝑌2𝐼_𝑋𝑉_𝑍+𝑉_𝑍−𝑉_𝑂−⎤⎥⎥⎥⎥⎥⎥⎦,(1) where 𝑔_𝑚 is transconductance of the DVCCTA.

Figure 1 

Circuit symbol of DVCCTA.

The CMOS-based internal circuit of DVCCTA in CMOS is depicted in Figure 2 and is based on internal circuit of DVCC [6] which is followed by a transconductance amplifier. The value of 𝑔_𝑚 is obtained as √2𝜇𝐶_𝑜𝑥(𝑊/𝐿)𝐼₀ which can be adjusted by bias current 𝐼₀. The TSMC 0.25 μm CMOS process model parameters and supply voltages of 𝑉_DD=−𝑉_SS=1.25𝑉 and 𝑉_BB=−0.8𝑉 are used. The aspect ratio of various transistors for DVCC is given in Table 1.

Table 1 

Aspect ratio of various transistors.

Figure 2 

Internal circuit of DVCCTA.

2.2. Universal Voltage-Mode Filter

In this section, a universal voltage-mode (VM) filter is proposed. It uses a single DVCCTA, two capacitors, and a grounded resistor. The proposed universal VM filter is shown in Figure 3. The analysis of circuit yields the output voltages at two nodes as follows𝑉_out1=𝑠𝐶²+𝑔_𝑚𝑉_in1+𝑠²𝐶₁𝐶₂𝑅𝑉_in2−𝑠𝐶₂𝑅𝑔_𝑚𝑉_in3𝑉𝐷(𝑠),(2)_out2=−𝑠𝐶¹𝑉_in1+𝑠𝐶₁𝑉_in2+𝑉_in3𝐷(𝑠)−𝑔_𝑚𝑉_in3𝐷(𝑠),(3) where𝐷(𝑠)=𝑠²𝐶₁𝐶₂𝑅+𝑠𝐶₂+𝑔_𝑚.(4)

Figure 3 

Proposed universal voltage-mode filter.

Table 2 shows the availability of each filter response and corresponding selection of input voltages 𝑉_in1, 𝑉_in2, and 𝑉_in3. Thus the proposed structure is a three-input and two output voltage-mode filter. The responses are characterized by pole frequency (𝜔₀), bandwidth (𝜔₀/𝑄₀), and quality factor (𝑄₀) as follows:𝜔₀=𝑔^𝑚𝑅𝐶₁𝐶₂^1/2,𝜔⁰𝑄₀=1𝑅𝐶₁,𝑄₀=𝑔^𝑚𝑅𝐶₁𝐶₂^1/2.(5)

Table 2 

The 𝑉_𝑖𝑛1, 𝑉_𝑖𝑛2, and 𝑉_𝑖𝑛3 values selection for each filter function response.

It may be noted that the value of 𝑔_𝑚 can easily be varied by bias currents 𝐼₀. The resistance 𝑅 being a grounded one may easily be implemented as a variable resistance using only two MOSs [17] or replacing DVCCTA along with resistor 𝑅 by DVCCCTA [15]. Equation (5) reveals that for high-pass and band-pass responses, the pole frequency (𝜔₀) and quality factor (𝑄₀) can be adjusted by 𝑔_𝑚, that is, by bias current (𝐼₀) of DVCCTA, without disturbing 𝜔₀/𝑄₀. The 𝜔₀ and 𝑄₀ are orthogonally adjustable with simultaneous adjustment of 𝑔_𝑚 and 𝑅 such that the product 𝑔_𝑚𝑅 remains constant, and the quotient 𝑔_𝑚/𝑅 varies and vice versa. Equation (5) also indicates that high values of Q factor will be obtained from moderate values of ratios of passive components, that is, from low component spread [21]. These ratios can be chosen as 𝑔_𝑚𝑅=(𝐶₁/𝐶₂)=𝑄₀. Hence, the spread of the component values becomes of the order of√𝑄₀. This feature of the filter related to the component spread allows the realization of high 𝑄₀ values more accurately compared to the topologies where the spread of passive components becomes 𝑄₀ or 𝑄²⁰. It can also be easily evaluated to show that the sensitivities of pole 𝜔₀ and pole 𝑄₀ are within unity in magnitude. Thus, the proposed structures can be classified as insensitive.

A detailed study of the available similar type of single active element- (such as CCCTA, DBTA, and DVCCCTA) based voltage-mode filters and the proposed one is given in Table 3. It reveals that the topology in [18] uses excessive number of passive components whereas the proposed topology uses one extra passive component, namely, resistor (R) in comparison to structures in [11, 15]; however this resistor (R) may be eliminated as discussed above. Structures in [15, 18] do not provide for all standard universal filter functions. Topology in [11] needs input signal 𝑉_in, −𝑉_in, and −2𝑉_in; hence, there is a requirement of additional circuits. Thus the proposed structure possesses all the advantageous features as tabulated in Table 3 without any additional components, rather passive components used may be reduced to 2 by eliminating resistor (R) at 𝑥 terminal with the use of DVCCCTA instead of DVCCTA.

Table 3 

Comparative study of the available similar type of single active element-based VM filters.

To verify the functionality of the proposed single DVCCTA-based voltage-mode filter, SPICE simulations have been carried out using TSMC 0.25 μm CMOS process model parameters and supply voltages of 𝑉_DD=−𝑉_SS=1.25V and 𝑉_BB=−0.8V. The aspect ratio of various transistors is given in Table 1. The filter is designed for a pole frequency of 𝑓₀ = 1.59 MHz, 𝑄=1, the component values are found to be 𝐶=𝐶₁=𝐶₂=100pF, 𝑅=1kΩ, and bias current of DVCCTA equals 100 𝜇A. Figure 4(a) shows the simulation results for low-pass (𝑉_out1) and high-pass (𝑉_out2) filter responses which are available simultaneously for 𝑉_in = 𝑉_in1 = 𝑉_in3, 𝑉_in2 = 0. Figure 4(b) shows the simulation results for high pass (𝑉_out1) and band-pass (𝑉_out2) filter responses which are available simultaneously for 𝑉_in = 𝑉_in2, 𝑉_in1 = 𝑉_in3 = 0. Notch and all pass responses are shown in Figures 4(c) and 4(d) with 𝑉_in = 𝑉_in1 = 𝑉_in2 = 𝑉_in3 and R = 1 kΩ and 2 kΩ, respectively.

(a)

(b)

(c)

(d)

Figure 4 

Simulated response of the proposed universal voltage-mode filter: (a) high-pass and low-pass, (b) high-pass and band-pass, (c) notch, (d) all pass.

2.3. MISO Current Mode Universal Filter

A multiple-input single-output (MISO) universal current mode (CM) filter is proposed in this section which is obtained by grounding all voltage inputs in Figure 3 and exciting them with current inputs as shown in Figure 5. Here, an extra Z-terminal is added to obtain 𝐼_out at high impedance. It employs a single DVCCTA, two grounded capacitors, and a grounded resistor. Analysis of this circuit gives the output current as follows:𝐼_out=𝑠²𝐶₁𝐶₂𝑅𝐼_in1−𝑠𝐶₂𝐼_in3+𝑔_𝑚𝐼_in2𝐷(𝑠),(6) where 𝐷(𝑠)=𝑠²𝐶₁𝐶₂𝑅+𝑠𝐶₂+𝑔_𝑚(7)

Figure 5 

Current mode universal filter.

Table 4 shows the availability of each filter response and corresponding selection of input currents 𝐼_in1,𝐼_in2, and 𝐼_in3. Thus, the proposed structure is a three-input single output current mode filter. It may be noted that there is no component matching constraint for obtaining any filter response. The filter parameters are the same as given in (5). The grounded resistance (R) may easily be implemented as variable one using only two MOSs [17] for full electronic control of filter parameters. The 𝜔₀,𝑄₀, and 𝜔₀/𝑄₀ can be orthogonally adjusted the way discussed in Section 2.2.

Table 4 

The 𝐼_in1, 𝐼_in2, and 𝐼_in3 values selection for each filter function response.

A detailed study of the available similar type of active element (such as CCCCTA, CCCDTA, and CC-CCTA) based CM filters and the proposed one is given in Table 5. It reveals that although the proposed structure needs one extra resistor, the reported structures in [11, 13, 19, 20] suffer from one or more features. In addition some active elements are required to sense current [13, 20]. Thus structures in [11, 13, 19, 20] will require some extra circuits to compensate the short comings in their features in comparison to the proposed one.

Table 5 

Comparative study of the available similar type of single active element based CM filters.

The proposed universal MISO current mode filter is validated through SPICE simulations. The circuit of Figure 5 for a pole frequency of 𝑓₀ = 1.59 MHz, Q = 1 has been designed with the component values of C = 𝐶₁ = 𝐶₂ = 100 pF, R = 1 kΩ and bias current of DVCCTA equals to 100 𝜇A. The low-pass, band-pass, high-pass, notch, and all pass responses are shown in Figure 6 which show close agreement with the theoretical formation.

(a)

(b)

(c)

Figure 6 

Simulated response of the proposed current mode universal filter: (a) high-pass, low-pass and band-pass, (b) notch, (c) all pass.

The orthogonal adjustment of 𝑓₀ with 𝑄₀ is depicted in Figure 7. This is designed for a constant value of 𝑄₀ = 1 with 𝐶₁ = 𝐶₂ = 100 pF for different values of 𝑓₀ as given in Table 6. Figure 8 shows orthogonal adjustment of 𝑄₀ with 𝑓₀ = 1.59 MHz. The values of 𝑄₀ for constant value of 𝑓₀ as obtained with 𝐶₁ = 𝐶₂ = 100 pF and other component values are listed in Table 7.

Table 6 

Component values for orthogonal adjustment of 𝑓₀ with 𝑄₀.

Table 7 

Component values for orthogonal adjustment of Q with 𝑓₀.

Figure 7 

Response of band-pass filter for constant 𝑄0 = 1 and different 𝑓0.

Figure 8 

Response of band-pass filter for constant 𝑓0 = 1.59 MHz and different 𝑄0.

The simulations have also been carried out to study the limits on tunability. Figure 9 shows the tuning of pole frequency (𝑓₀) of the band-pass filter with bias current (𝐼₀) (i.e., with 𝑔_𝑚) for 𝐶₁ = 𝐶₂ = 100 pF and R = 1 kΩ. It may be noted that the tuning of pole frequency (𝑓₀) is adequate up to about 200 𝜇A and then the tuning is slow till 450 𝜇A. The decreases in pole frequency for larger bias currents than 450 𝜇A are due to transistors (𝑀₂₁, 𝑀₂₂) entering in linear region of operation from saturation region.

Figure 9 

Tunability of pole frequency with bias current.

3. Conclusion

New universal voltage-mode and current-mode filters using a single DVCCTA have been presented. The circuits use one DVCCTA, two capacitors, and a resistor for realization. The resistor being grounded may easily be implemented as a variable one using only two MOSs [17]. The resistor may be eliminated by replacing DVCCTA with DVCCCTA in the case of VM filter. The simulation results verify the theory. The salient features of the proposed circuits are as follows: they employ a single DVCCTA, low sensitivity performance, electronic tunability of both 𝜔₀ and 𝜔₀/𝑄₀ and 𝜔₀ and 𝑄₀, high output impedance for CM filter, which are suitable for cascading, and low component spread for high-𝑄 application.