About this Journal Submit a Manuscript Table of Contents
Active and Passive Electronic Components
Volume 2012 (2012), Article ID 472306, 10 pages
http://dx.doi.org/10.1155/2012/472306
Research Article

Design Optimization of Transistors Used for Neural Recording

Electrical Engineering Department, San Jose State University, San Jose, CA 95192-0084, USA

Received 16 July 2011; Revised 5 October 2011; Accepted 18 October 2011

Academic Editor: Mingxiang Wang

Copyright © 2012 Eric Basham and David Parent. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Neurons cultured directly over open-gate field-effect transistors result in a hybrid device, the neuron-FET. Neuron-FET amplifier circuits reported in the literature employ the neuron-FET transducer as a current-mode device in conjunction with a transimpedance amplifier. In this configuration, the transducer does not provide any signal gain, and characterization of the transducer out of the amplification circuit is required. Furthermore, the circuit requires a complex biasing scheme that must be retuned to compensate for drift. Here we present an alternative strategy based on the 𝑔 π‘š / 𝐼 𝑑 design approach to optimize a single-stage common-source amplifier design. The 𝑔 π‘š / 𝐼 𝑑 design approach facilitates in circuit characterization of the neuron-FET and provides insight into approaches to improving the transistor process design for application as a neuron-FET transducer. Simulation data for a test case demonstrates optimization of the transistor design and significant increase in gain over a current mode implementation.