217674.fig.005a
(a)
217674.fig.005b
(b)
217674.fig.005c
(c)
217674.fig.005d
(d)
Figure 5: Simulated and predicted delay of proposed D-latch versus with NM = 130 mV, , and different load capacitances (a)  fF, (b)  fF, (c)  fF, and (d)  pF.