Modeling of the Channel Thickness Influence on Electrical Characteristics and Series Resistance in Gate-Recessed Nanoscale SOI MOSFETs

<table>Comparison of the measured resistance <svg height="15.4" id="M168" style="vertical-align:-3.3907pt" version="1.1" viewbox="0 0 21.0875 15.4" width="21.0875" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.112)"><path d="M627 18l-10 -26q-79 6 -116 27t-69 76q-41 71 -71 138q-13 29 -27.5 39t-42.5 10h-46l-27 -145q-13 -74 -2.5 -88.5t78.5 -20.5l-6 -28h-271l5 28q66 6 82.5 21.5t30.5 87.5l71 387q12 66 2 78.5t-77 19.5l8 28h233q102 0 147 -29q65 -43 65 -129q0 -69 -45.5 -117
t-115.5 -72q40 -86 66 -133q39 -68 65 -101q28 -37 73 -51zM491 483q0 67 -33.5 101t-91.5 34q-35 0 -51 -10q-13 -8 -20 -48l-45 -245h49q71 0 113 28q79 52 79 140z" id="x1D445"></path></g>
<g transform="matrix(.012,-0,0,-.012,11.013,15.187)"><path d="M766 88q-40 -45 -83.5 -72.5t-63.5 -27.5q-39 0 -16 103l49 224q15 68 -10 68q-36 0 -112.5 -78.5t-105.5 -133.5q-27 -101 -38 -165q-35 -4 -77 -18l-6 6q42 153 70 288q12 55 10 78t-19 23q-38 0 -114 -80.5t-101 -131.5q-24 -68 -41 -165q-36 -3 -76 -18l-8 6
q56 202 87 347q7 33 -3 33q-8 0 -31.5 -17.5t-41.5 -35.5l-12 28q42 45 84 72t63 27q44 0 10 -124l-20 -75h2q92 121 193 178q36 21 64 21q62 0 28 -159l-8 -37h2q50 67 103.5 112t94.5 65q39 19 62 19q60 0 23 -156l-45 -189q-9 -39 2 -39q17 0 71 49z" id="x1D45A"></path></g>
</svg> for NSB’s devices having a channel thickness of 1.86 nm, with UTBs devices (46 nm channel thick), as function of channel length (<svg height="11.175" id="M169" style="vertical-align:-0.0pt" version="1.1" viewbox="0 0 9.8249998 11.175" width="9.8249998" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.113)"><path d="M559 163q-23 -66 -68 -163h-474l6 26q62 4 79.5 19.5t28.5 75.5l78 409q7 35 8.5 49t-8 25t-24 13t-51.5 5l5 28h266l-6 -28q-65 -5 -79.5 -18t-25.5 -74l-76 -406q-10 -57 14 -75q12 -13 96 -13q93 0 126 29q41 40 76 109z" id="x1D43F"></path></g>
</svg>) and several <svg height="15.4375" id="M170" style="vertical-align:-3.41936pt" version="1.1" viewbox="0 0 27.512501 15.4375" width="27.512501" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.112)"><path d="M730 650l-8 -28q-52 -4 -72 -18t-64 -77q-79 -113 -321 -539h-33l-119 541q-13 59 -29.5 73t-66.5 20l7 28h245l-8 -28l-28 -5q-33 -6 -40.5 -15.5t-0.5 -38.5l102 -450h2q191 320 246 430q21 42 15.5 56t-43.5 19l-31 4l7 28h240z" id="x1D449"></path></g>
<g transform="matrix(.012,-0,0,-.012,12.675,15.187)"><path d="M692 302v-28q-45 -6 -54.5 -17t-9.5 -55v-86q0 -62 7 -95q-7 -2 -32 -7.5l-37 -8l-35.5 -7.5t-40.5 -7t-38.5 -4t-40.5 -2q-165 0 -266 93t-101 243q0 84 32 151t86 108t121.5 63t142.5 22q29 0 62.5 -4t52 -7.5t47.5 -10.5t31 -7l15 -156l-28 -6q-17 87 -66.5 121.5
t-128.5 34.5q-117 0 -191 -80.5t-74 -216.5q0 -56 17 -110t49.5 -100.5t87.5 -74.5t124 -28q53 0 87 17q17 9 24.5 23t7.5 43v85q0 54 -15.5 67.5t-89.5 18.5v28h254z" id="x47"></path></g><g transform="matrix(.012,-0,0,-.012,21.183,15.187)"><path d="M409 504l-29 -5q-16 60 -44.5 96t-86.5 36q-54 0 -82.5 -32t-28.5 -77q0 -51 30.5 -82.5t96.5 -65.5l35.5 -18t33 -19.5t33.5 -23.5l27 -25.5t24.5 -32t13.5 -36.5t6 -45q0 -80 -62 -134.5t-160 -54.5q-47 0 -98 15q-22 7 -50 21q-8 23 -27 155l30 7q7 -27 18 -52
t30 -51.5t49 -42.5t67 -16q56 0 88 32.5t32 87.5q0 51 -31.5 82t-98.5 67q-80 44 -110 73q-55 53 -55 124q0 75 56 126.5t150 51.5q53 0 126 -23z" id="x53"></path></g>
</svg> positive values.</table>

Active and Passive Electronic Components

fig10

Figure 10

Figure 10: Modeling of the Channel Thickness Influence on Electrical Characteristics and Series Resistance in Gate-Recessed Nanoscale SOI MOSFETs 