Active and Passive Electronic Components The latest articles from Hindawi Publishing Corporation © 2015 , Hindawi Publishing Corporation . All rights reserved. Thermomechanical Behaviour of a PWB by Speckle Interferometry Technique Tue, 18 Aug 2015 09:50:21 +0000 The speckle interferometry technique has been used in this work in order to determine the thermomechanical behaviour of Printed Wiring Board (PWB) (circuits) of a radio integrated with tape player and speakers. A preliminary experiment of such technique has been carried out on a single electronic component (silicon transistor), during the thermal transient and at the steady state. The thermal deformation and stresses on PWB have been obtained through related experimental analyses on both cases. The results showed a very good applicability of speckle technique on the irregular object surface as PWB. Bartolomeo Trentadue and Giuseppe Illuzzi Copyright © 2015 Bartolomeo Trentadue and Giuseppe Illuzzi. All rights reserved. A Very Compact and Sharp Roll-Off Low-Pass Filter with Four Transmission Zeros Tue, 11 Aug 2015 05:48:49 +0000 A novel structure with sharp roll-off, wide stopband, and very compact size is presented in this paper. By combining a capacitor-embedded transmission line ring and two shunt open stubs, this structure exhibits a high-performance three-pole low-pass filter (LPF) response with four generated transmission zeros. With the help of these four transmission zeros, the proposed LPF achieves improved roll-off rate, extended stopband, and significantly very compact size. To verify the feasibility of the proposed structure, a prototype LPF having the cut-off frequency at 0.63 GHz is designed, fabricated, and measured as an illustrative example. Final result shows that a roll-off rate of 109.3 dB/GHz along with a relative stopband bandwidth of 114.6% can be obtained. Moreover, the filter dimensions are as small as 15.7 mm × 26.9 mm, that is, , where is the guided wavelength at the cut-off frequency. The filter structure is simple and easy to fabricate as well. Yang Xiao and Lin Li Copyright © 2015 Yang Xiao and Lin Li. All rights reserved. Analytical Model of Random Variation in Drain Current of FGMOSFET Wed, 15 Jul 2015 08:35:27 +0000 The analytical model of random variation in drain current of the Floating Gate MOSFET (FGMOSFET) has been proposed in this research. The model is composed of two parts for triode and saturation region of operation where the process induced device level random variations of each region and their statistical correlations have been taken into account. The nonlinearity of floating gate voltage and dependency on drain voltage of the coupling factors of FGMOSFET have also been considered. The model has been found to be very accurate since it can accurately fit the SPICE BSIM3v3 based reference obtained by using Monte-Carlo SPICE simulation and FGMOSFET simulation technique with SPICE. It can fit the BSIM4 based reference if desired by using the optimally extracted parameters. By using the proposed model, the variability analysis of FGMOSFET and the analytical modeling of the variation in the circuit level parameter of any FGMOSFET based circuit can be performed. So, this model has been found to be an efficient tool for the variability aware analysis and design of FGMOSFET based circuit. Rawid Banchuin Copyright © 2015 Rawid Banchuin. All rights reserved. Design of a Novel High Power V-Band Helix-Folded Waveguide Cascaded Traveling Wave Tube Amplifier Mon, 01 Jun 2015 09:47:15 +0000 A design of a V-band Helix-Folded Waveguide (H-FWG) cascaded traveling wave tube (TWT) is presented. In this cascaded structure, a digitized nonlinear theory model is put forward first to simulate these two types of the tubes by common process. Then, an initial design principle is proposed, which can design these two different kinds of tubes universally. Using this principle, a high-gain helix TWT is carefully designed as a first stage amplifier followed by a FWG TWT to obtain high power. Simulations predict that a peak power of 800 W with saturated gain of 60 dB from 55 GHz to 60 GHz can be achieved. Tianxiang Zhuge and Yulu Hu Copyright © 2015 Tianxiang Zhuge and Yulu Hu. All rights reserved. Usage and Limitation of Standard Mobility Models for TCAD Simulation of Nanoscaled FD-SOI MOSFETs Tue, 26 May 2015 12:17:42 +0000 TCAD tools have been largely improved in the last decades in order to support both process and device complementary simulations which are usually based on continuously developed models following the technology progress. In this paper, we compare between experimental and TCAD simulated results of two kinds of nanoscale devices: ultrathin body (UTB) and nanoscale Body (NSB) SOI-MOSFET devices, sharing the same W/L ratio but having a channel thickness ratio of 10 : 1 (46 nm and 4.6 nm, resp.). The experimental transfer I-V characteristics were found to be surprisingly different by several orders of magnitude. We analyzed this result by considering the severe mobility degradation and the influence of a large gate voltage dependent series resistance (). TCAD tools do not usually consider to be either channel thickness or gate voltage dependent. After observing a clear discrepancy between the mobility values extracted from our measurements and those modeled by the available TCAD models, we propose a new semiempirical approach to model the transfer characteristics. A. Ciprut, A. Chelly, and A. Karsenty Copyright © 2015 A. Ciprut et al. All rights reserved. Control for the Three-Phase Four-Wire Four-Leg APF Based on SVPWM and Average Current Method Mon, 16 Mar 2015 13:12:29 +0000 A novel control method is proposed for the three-phase four-wire four-leg active power filter (APF) to realize the accurate and real-time compensation of harmonic of power system, which combines space vector pulse width modulation (SVPWM) with triangle modulation strategy. Firstly, the basic principle of the APF is briefly described. Then the harmonic and reactive currents are derived by the instantaneous reactive power theory. Finally simulation and experiment are built to verify the validity and effectiveness of the proposed method. The simulation results show that the response time for compensation is about 0.025 sec and the total harmonic distortion (THD) of the source current of phase is reduced from 33.38% before compensation to 3.05% with APF. Xiangshun Li and Jianghua Lu Copyright © 2015 Xiangshun Li and Jianghua Lu. All rights reserved. Trigger Pulse Generator Using Proposed Buffered Delay Model and Its Application Sun, 18 Jan 2015 07:32:16 +0000 This paper proposes a circuit capable of incorporating buffered delays in the order of picoseconds. To study our proposed circuit in the profound way, we have also explored our proposed circuit using emerging technologies such as FinFET and CNFET. Comparisons between these technologies have been made in terms of different parameters such as duration of incorporated delays (pulse width) and its variability with supply voltages. Further, this paper also proposes a trigger pulse generator by utilizing proposed buffered delay circuit as its basic element. Parametric results obtained for the proposed trigger pulse generator match different application specific requirements. These applications are also mentioned in this paper. The proposed trigger pulse generator requires very low supply voltage (700 mV) and also proves its effectiveness in terms of tunability of pulse width of the generated pulses. The modeling of the circuit has been done using Verilog and the simulation results are extensively verified using SPICE. Amit Krishna Dwivedi, Kumar Abhijeet Urma, and Aminul Islam Copyright © 2015 Amit Krishna Dwivedi et al. All rights reserved. On the Evaluation of Gate Dielectrics for 4H-SiC Based Power MOSFETs Thu, 01 Jan 2015 12:33:16 +0000 This work deals with the assessment of gate dielectric for 4H-SiC MOSFETs using technology based two-dimensional numerical computer simulations. Results are studied for variety of gate dielectric candidates with varying thicknesses using well-known Fowler-Nordheim tunneling model. Compared to conventional SiO2 as a gate dielectric for 4H-SiC MOSFETs, high- gate dielectric such as HfO2 reduces significantly the amount of electric field in the gate dielectric with equal gate dielectric thickness and hence the overall gate current density. High- gate dielectric further reduces the shift in the threshold voltage with varying dielectric thicknesses, thus leading to better process margin and stable device operating behavior. For fixed dielectric thickness, a total shift in the threshold voltage of about 2.5 V has been observed with increasing dielectric constant from SiO2 () to HfO2 (). This further results in higher transconductance of the device with the increase of the dielectric constant from SiO2 to HfO2. Furthermore, 4H-SiC MOSFETs are found to be more sensitive to the shift in the threshold voltage with conventional SiO2 as gate dielectric than high-k dielectric with the presence of interface state charge density that is typically observed at the interface of dielectric and 4H-SiC MOS surface. Muhammad Nawaz Copyright © 2015 Muhammad Nawaz. All rights reserved. Investigation of the Low-Temperature Behavior of FD-SOI MOSFETs in the Saturation Regime Using and Functions Mon, 15 Dec 2014 09:07:57 +0000 The saturation regime of two types of fully depleted (FD) SOI MOSFET devices was studied. Ultrathin body (UTB) and gate recessed channel (GRC) devices were fabricated simultaneously on the same silicon wafer through a selective “gate recessed” process. They share the same W/L ratio but have a channel film thickness of 46 nm and 2.2 nm, respectively. Their standard characteristics ( and ) of the devices were measured at room temperature before cooling down to 77 K. Surprisingly, their respective temperature dependence is found to be opposite. In this paper, we focus our comparative analysis on the devices' conduction using a Y-function applied to the saturation domain. The influence of the temperature in this domain is presented for the first time. We point out the limits of the Y-function analysis and show that a new function called Z can be used to extract the series resistance in the saturation regime. A. Karsenty and A. Chelly Copyright © 2014 A. Karsenty and A. Chelly. All rights reserved. Multiple High Voltage Pulse Stressing of Polymer Thick Film Resistors Wed, 19 Nov 2014 09:43:32 +0000 The purpose of this paper is to study high voltage interactions in polymer thick film resistors, namely, polyvinyl chloride- (PVC-) graphite thick film resistors, and their applications in universal trimming of these resistors. High voltages in the form of impulses for various pulse durations and with different amplitudes have been applied to polymer thick film resistors and we observed the variation of resistance of these resistors with high voltages. It has been found that the resistance of polymer thick film resistors decreases in the case of higher resistivity materials and the resistance of polymer thick film resistor increases in the case of lower resistivity materials when high voltage impulses are applied to them. It has been also found that multiple high voltage pulse (MHVP) stressing can be used to trim the polymer thick film resistors either upwards or downwards. Busi Rambabu and Y. Srinivasa Rao Copyright © 2014 Busi Rambabu and Y. Srinivasa Rao. All rights reserved. Realization of DVCCTA Based Versatile Modulator Mon, 27 Oct 2014 09:02:02 +0000 A Differential Voltage Current Conveyor Transconductance Amplifier (DVCCTA) based versatile modulator is proposed which can work as an amplitude modulator, frequency modulator, delta modulator, and sigma delta modulator. The modulator operational scheme uses pulse generator as a core and its output is used as carrier signal. A DVCCTA based pulse generator is proposed first and subsequently configured as different modulators. Compact realization is the key feature of the proposed circuit as it uses two DVCCTA; a grounded resistor and a grounded capacitor hence are appropriate for IC realization. The functionality of the proposed circuit is verified through SPICE simulations using TSMC 0.25 μm CMOS process model parameters. The performance parameters such as power dissipation and noise for various modulator schemes are also obtained. Neeta Pandey, Rajeshwari Pandey, Aseem Sayal, and Manan Tripathi Copyright © 2014 Neeta Pandey et al. All rights reserved. Reconfigurable Mixed Mode Universal Filter Mon, 20 Oct 2014 08:25:05 +0000 This paper presents a novel mixed mode universal filter configuration capable of working in voltage and transimpedance mode. The proposed single filter configuration can be reconfigured digitally to realize all the five second order filter functions (types) at single output port. Other salient features of proposed configuration include independently programmable filter parameters, full cascadability, and low sensitivity figure. However, all these features are provided at the cost of quite large number of active elements. It needs three digitally programmable current feedback amplifiers and three digitally programmable current conveyors. Use of six active elements is justified by introducing three additional reduced hardware mixed mode universal filter configurations and its comparison with reported filters. Neelofer Afzal and Devesh Singh Copyright © 2014 Neelofer Afzal and Devesh Singh. All rights reserved. Sinusoidal Generator with π/4-Shifted Four/Eight Voltage Outputs Employing Four Grounded Components and Two/Six Active Elements Thu, 28 Aug 2014 05:21:00 +0000 This paper presents a new circuit proposal for multiphase sine-wave generation, employing two active elements and four grounded passive elements. The proposed oscillator provides four 45° phase-shifted voltage outputs. Incorporation of additional inverters for generation of eight-phase outputs is further shown. Simultaneous current outputs can also be generated with additional output stages. The compact circuit structure is studied for nonideal and parasitic effects and simulation results are given, which are in good agreement with the theory. The utility of the proposal for π/4-QPSK generation is explored as an interesting application example with supporting results. Sudhanshu Maheshwari Copyright © 2014 Sudhanshu Maheshwari. All rights reserved. Implementation of Power Efficient Flash Analogue-to-Digital Converter Thu, 14 Aug 2014 11:36:04 +0000 An efficient low power high speed 5-bit 5-GS/s flash analogue-to-digital converter (ADC) is proposed in this paper. The designing of a thermometer code to binary code is one of the exacting issues of low power flash ADC. The embodiment consists of two main blocks, a comparator and a digital encoder. To reduce the metastability and the effect of bubble errors, the thermometer code is converted into the gray code and there after translated to binary code through encoder. The proposed encoder is thus implemented by using differential cascade voltage switch logic (DCVSL) to maintain high speed and low power dissipation. The proposed 5-bit flash ADC is designed using Cadence 180 nm CMOS technology with a supply rail voltage typically ±0.85 V. The simulation results include a total power dissipation of 46.69 mW, integral nonlinearity (INL) value of −0.30 LSB and differential nonlinearity (DNL) value of −0.24 LSB, of the flash ADC. Taninki Sai Lakshmi, Avireni Srinivasulu, and Pittala Chandra Shaker Copyright © 2014 Taninki Sai Lakshmi et al. All rights reserved. Analysis of the Coupling Coefficient in Inductive Energy Transfer Systems Tue, 17 Jun 2014 08:17:30 +0000 In wireless energy transfer systems, the energy is transferred from a power source to an electrical load without the need of physical connections. In this scope, inductive links have been widely studied as a way of implementing these systems. Although high efficiency can be achieved when the system is operating in a static state, it can drastically decrease if changes in the relative position and in the coupling coefficient between the coils occur. In this paper, we analyze the coupling coefficient as a function of the distance between two planar and coaxial coils in wireless energy transfer systems. A simple equation is derived from Neumann’s equation for mutual inductance, which is then used to calculate the coupling coefficient. The coupling coefficient is computed using CST Microwave Studio and compared to calculation and experimental results for two coils with an excitation signal of up to 10 MHz. The results showed that the equation presents good accuracy for geometric parameters that do not lead the solution of the elliptic integral of the first kind to infinity. Rafael Mendes Duarte and Gordana Klaric Felic Copyright © 2014 Rafael Mendes Duarte and Gordana Klaric Felic. All rights reserved. Y-Function Analysis of the Low Temperature Behavior of Ultrathin Film FD SOI MOSFETs Wed, 11 Jun 2014 11:16:35 +0000 The respective transfer characteristics of the ultrathin body (UTB) and gate recessed channel (GRC) device, sharing same W/L ratio but having a channel thickness of 46 nm, and 2.2 nm respectively, were measured at 300 K and at 77 K. By decreasing the temperature we found that the electrical behaviors of these devices were radically opposite: if for UTB device, the conductivity was increased, the opposite effect was observed for GRC. The low field electron mobility and series resistance values were extracted using a method based on Y-function for both the temperatures. If low values were found for UTB, very high values (>1) were extracted for GRC. Surprisingly, for the last device, the effective field mobility is found very low (<1) and is decreasing by lowering the temperature. After having discussed the limits of this analysis.This case study illustrates the advantage of the Y-analysis in discriminating a parameter of great relevance for nanoscale devices and gives a coherent interpretation of an anomalous electrical behavior. A. Karsenty and A. Chelly Copyright © 2014 A. Karsenty and A. Chelly. All rights reserved. A Novel Power Electronic Inverter Circuit for Transformerless Photovoltaic Systems Mon, 26 May 2014 07:26:41 +0000 Capacitive leakage current is one of the most important issues for transformerless photovoltaic systems. In order to deal with the capacitive leakage current, a new power electronic inverter circuit is proposed in this paper. The inverter circuit consists of six switches and operates with constant common mode voltage. Theoretical analysis is conducted to clarify the circuit operation principle and the common mode characteristic. The performance evaluation test is carried out, and test results demonstrate that the capacitive leakage current can be significantly minimized with the proposed power electronic inverter circuit. Cao Hai-Yan Copyright © 2014 Cao Hai-Yan. All rights reserved. Active Comb Filter Using Operational Transconductance Amplifier Thu, 22 May 2014 10:52:37 +0000 A new approach for the design of an active comb filter is proposed to remove the selected frequencies of various signals. The proposed filter is based on only OTAs and capacitors, hence suitable for monolithic integrated circuit implementation. The workability of the circuit is tested using PSPICE for test signals of 60, 180, 300, and 420 Hz as in ECG signal. The results are given in the paper and found to agree well with theory. Rajeev Kumar Ranjan, Surya Prasanna Yalla, Shubham Sorya, and Sajal K. Paul Copyright © 2014 Rajeev Kumar Ranjan et al. All rights reserved. Design of a 2 GHz Linear-in-dB Variable-Gain Amplifier with 80-dB Gain Range Thu, 17 Apr 2014 12:03:58 +0000 A broadband linear-in-dB variable-gain amplifier (VGA) circuit is implemented in 0.18 μm SiGe BiCMOS process. The VGA comprises two cascaded variable-gain core, in which a hybrid current-steering current gain cell is inserted in the Cherry-Hooper amplifier to maintain a broad bandwidth while covering a wide gain range. Postlayout simulation results confirm that the proposed circuit achieves a 2 GHz 3-dB bandwidth with wide linear-in-dB gain tuning range from −19 dB up to 61 dB. The amplifier offers a competitive gain bandwidth product of 2805 GHz at the maximum gain for a 110-GHz ft BiCMOS technology. The amplifier core consumes 31 mW from a 3.3 V supply and occupies active area of 280 μm by 140 μm. Zhengyu Sun and Yuepeng Yan Copyright © 2014 Zhengyu Sun and Yuepeng Yan. All rights reserved. Harmonic-Rejection Compact Bandpass Filter Using Defected Ground Structure for GPS Application Thu, 03 Apr 2014 08:17:23 +0000 A miniaturized bandpass filter (BPF) using defected ground structure (DGS) resonator with the characteristic of harmonic rejection is developed in this paper. The second and third harmonics of the proposed BPF are rejected by the characteristic of stepped-impedance DGS resonator. Moreover, open stubs are established so that two adjustable transmission zeros can independently be created to extend the stopband and improve the rejection level. Finally, a second-order BPF, centered at 1.62 GHz with a stopband extended up to 5.6 GHz and a rejection level better than 20 dB, is designed and implemented for GPS application. A good agreement between simulation and measurement verifies the validity of this design methodology. Haiwen Liu, Baoping Ren, Xiang Xiao, Zhichong Zhang, Shen Li, and Suping Peng Copyright © 2014 Haiwen Liu et al. All rights reserved. New Realizations of Single OTRA-Based Sinusoidal Oscillators Mon, 10 Mar 2014 09:48:35 +0000 This study proposes three new sinusoidal oscillators based on an operational transresistance amplifier (OTRA). Each of the proposed oscillator circuits consists of one OTRA combined with a few passive components. The first circuit is an OTRA-based minimum RC oscillator. The second circuit is capable of providing independent control on the condition of oscillation without affecting the oscillation frequency. The third circuit exhibits independent control of oscillation frequency through a capacitor. This study first introduces the OTRA and the related formulations of the proposed oscillator circuits, and then discusses the nonideal effects, sensitivity analyses, and frequency stability of the presented circuits. The proposed oscillators exhibit low sensitivities and good frequency stability. Because the presented circuits feature low impedance output, they can be connected directly to the next stage without cascading additional voltage buffers. HSPICE simulations and experimental results confirm the feasibility of the new oscillator circuits. Hung-Chun Chien Copyright © 2014 Hung-Chun Chien. All rights reserved. Signal Integrity Analysis in Carbon Nanotube Based Through-Silicon Via Sun, 02 Mar 2014 00:00:00 +0000 Development of a reliable 3D integrated system is largely dependent on the choice of filler materials used in through-silicon vias (TSVs). This research paper presents carbon nanotube (CNT) bundles as prospective filler materials for TSVs and provides an analysis of signal integrity for different single- (SWCNT), double- (DWCNT), and multi-walled CNT (MWCNT) bundle based TSVs. Depending on the physical configuration of a pair of TSVs, an equivalent electrical model is employed to analyze the in-phase and out-phase delays. It is observed that, using an MWCNT bundle (with number of shells = 10), the overall in-phase delays are reduced by 96.86%, 92.33%, 78.35%, and 32.72% compared to the bundled SWCNT, DWCNT, 4-shell MWCNT, and 8-shell MWCNT, respectively; similarly, the overall reduction in out-phase delay is 85.89%, 73.38%, 45.92%, and 12.56%, respectively. Manoj Kumar Majumder, Archana Kumari, Brajesh Kumar Kaushik, and Sanjeev Kumar Manhas Copyright © 2014 Manoj Kumar Majumder et al. All rights reserved. Bandwidth Extension of High Compliance Current Mirror by Using Compensation Methods Tue, 21 Jan 2014 00:00:00 +0000 Due to the huge demand of high-speed analog integrated circuits, it is essential to develop a wideband low input impedance current mirror that can be operated at low power supply. In this paper, a novel wideband low voltage high compliance current mirror using low voltage cascode current mirror (LVCCM) as a basic building block is proposed. The resistive compensation and inductive peaking methods have been used to extend the bandwidth of the conventional current mirror. By replacing conventional LVCCM in a high compliance current mirror with the compensated LVCCM, the bandwidth extension ratio of 3.4 has been achieved with no additional DC power dissipation and without affecting its other performances. The circuits are designed in TSMC 0.18 μm CMOS technology on Spectre simulator of Cadence. Maneesha Gupta, Urvashi Singh, and Richa Srivastava Copyright © 2014 Maneesha Gupta et al. All rights reserved. Three Microwave Frequency Dividers Using Current Source/Sink and Modified Current Source Inverters Mon, 30 Dec 2013 10:27:30 +0000 In a preceding paper Carlos E. Saavedra, 2005, established that frequency division can be achieved with the use of inverter rings and transmission gates. In this paper, we suggest three modified circuits which obtain the similar function, namely, using Current Sink Inverter, Current Source Inverter, and Modified Current Source Inverter. The performances of the proposed circuits are examined using Cadence and the model parameters of a 45 nm CMOS process. The simulation results of the three circuits are presented and are compared. We also present the results of a simple but effective novel technique to reduce clock skew between real and complementary clock signals and the corresponding improvement achieved in maximum frequency of operation. One of the proposed circuits can operate at up to 8.2 GHz input while performing a divide-by-4 operation. Gautham S. Harinarayan and Avireni Srinivasulu Copyright © 2013 Gautham S. Harinarayan and Avireni Srinivasulu. All rights reserved. A Low-Power Ultrawideband Low-Noise Amplifier in 0.18 μm CMOS Technology Tue, 24 Dec 2013 14:47:16 +0000 This paper presents an ultrawideband low-noise amplifier chip using TSMC 0.18 μm CMOS technology. We propose a UWB low noise amplifier (LNA) for low-voltage and low-power application. The present UWB LNA leads to a better performance in terms of isolation, chip size, and power consumption for low supply voltage. This UWB LNA is designed based on a current-reused topology, and a simplified RLC circuit is used to achieve the input broadband matching. Output impedance introduces the LC matching method to reduce power consumption. The measured results of the proposed LNA show an average power gain (S21) of 9 dB with the 3 dB band from 3 to 5.6 GHz. The input reflection coefficient (S11) less than −9 dB is from 3 to 11 GHz. The output reflection coefficient (S22) less than −8 dB is from 3 to 7.5 GHz. The noise figure 4.6–5.3 dB is from 3 to 5.6 GHz. Input third-order-intercept point (IIP3) of 2 dBm is at 5.3 GHz. The dc power consumption of this LNA is 9 mW under the supply of a 1 V supply voltage. The chip size of the CMOS UWB LNA is  mm2 in total. Jun-Da Chen Copyright © 2013 Jun-Da Chen. All rights reserved. Circuit Implementation, Operation, and Simulation of Multivalued Nonvolatile Static Random Access Memory Using a Resistivity Change Device Sat, 14 Dec 2013 10:16:54 +0000 We proposed and computationally analyzed a multivalued, nonvolatile SRAM using a ReRAM. Two reference resistors and a programmable resistor are connected to the storage nodes of a standard SRAM cell. The proposed 9T3R MNV-SRAM cell can store 2 bits of memory. In the storing operation, the recall operation and the successive decision operation of whether or not write pulse is required can be performed simultaneously. Therefore, the duration of the decision operation and the circuit are not required when using the proposed scheme. In order to realize a stable recall operation, a certain current (or voltage) is applied to the cell before the power supply is turned on. To investigate the process variation tolerance and the accuracy of programmed resistance, we simulated the effect of variations in the width of the transistor of the proposed MNV-SRAM cell, the resistance of the programmable resistor, and the power supply voltage with 180 nm 3.3 V CMOS HSPICE device models. Kazuya Nakayama and Akio Kitagawa Copyright © 2013 Kazuya Nakayama and Akio Kitagawa. All rights reserved. Influence of Series Massive Resistance on Capacitance and Conductance Characteristics in Gate-Recessed Nanoscale SOI MOSFETs Wed, 11 Dec 2013 14:29:03 +0000 Ultrathin body (UTB) and nanoscale body (NSB) SOI MOSFET devices, having a channel thickness ranging from 46 nm (UTB scale) down to 1.6 nm (NSB scale), were fabricated using a selective “gate recessed” process on the same silicon wafer. The gate-to-channel capacitance and conductance complementary characteristics, measured for NSB devices, were found to be radically different from those measured for UTBS. Consistent and trends are observed by varying the frequency , the channel length , and the channel thickness (). In this paper, we show that these trends can be analytically modeled by a massive series resistance depending on the gate voltage and on the channel thickness. The effects of leakage conductance and interface trap density are also modeled. This modeling approach may be useful to analyze and/or simulate electrical behavior of nanodevices in which series resistance is of a great concern. Avraham Karsenty and Avraham Chelly Copyright © 2013 Avraham Karsenty and Avraham Chelly. All rights reserved. A 0.8–6 GHz Wideband Receiver Front-End for Software-Defined Radio Mon, 09 Dec 2013 16:08:18 +0000 A wideband (0.8–6 GHz) receiver front-end (RFE) utilizing a shunt resistive feedback low-noise amplifier (LNA) and a micromixer is realized in 90 nm CMOS technology for software-defined radio (SDR) applications. With the shunt resistive feedback and series inductive peaking, the proposed LNA is able to achieve a wideband frequency response in input matching, power gain and noise figure (NF). A micromixer down converts the radio signal and performs single-to-differential transition. Measurements show the conversion gain higher than 17 dB and input matching (S11) better than −7.3 dB from 0.8 to 6 GHz. The IIP3 ranges from −7 to −10 dBm, and the NF from 4.5 to 5.9 dB. This wideband receiver occupies 0.48 mm2 and consumes 13 mW. Kuan-Ting Lin, Tao Wang, and Shey-Shi Lu Copyright © 2013 Kuan-Ting Lin et al. All rights reserved. MCML D-Latch Using Triple-Tail Cells: Analysis and Design Mon, 04 Nov 2013 14:33:56 +0000 A new low-voltage MOS current mode logic (MCML) topology for D-latch is proposed. The new topology employs a triple-tail cell to lower the supply voltage requirement in comparison to traditional MCML D-latch. The design of the proposed MCML D-latch is carried out through analytical modeling of its static parameters. The delay is expressed in terms of the bias current and the voltage swing so that it can be traded off with the power consumption. The proposed low-voltage MCML D-latch is analyzed for the two design cases, namely, high-speed and power-efficient, and the performance is compared with the traditional MCML D-latch for each design case. The theoretical propositions are validated through extensive SPICE simulations using TSMC 0.18 µm CMOS technology parameters. Kirti Gupta, Neeta Pandey, and Maneesha Gupta Copyright © 2013 Kirti Gupta et al. All rights reserved. A Design of a Terahertz Microstrip Bandstop Filter with Defected Ground Structure Wed, 30 Oct 2013 10:26:02 +0000 A planar microstrip terahertz (THz) bandstop filter has been proposed with defected ground structure with high insertion loss (S21) in a stopband of −25.8 dB at 1.436 THz. The parameters of the circuit model have been extracted from the EM simulation results. A dielectric substrate of Benzocyclobutene (BCB) is used to realize a compact bandstop filter using modified hexagonal dumbbell-shape defected ground structure (DB-DGS). In this paper, a defected ground structure topology is used in a λ/4, 50 Ω microstrip line at THz frequency range for compactness. No article has been reported on the microstrip line at terahertz frequency regime using DGS topology. The proposed filter can be used for sensing and detection in biomedical instruments in DNA testing. All the simulations/cosimulations are carried out using a full-wave EM simulator CST V.9 Microwave Studio, HFSS V.10, and Agilent Design Suite (ADS). Arjun Kumar and M. V. Kartikeyan Copyright © 2013 Arjun Kumar and M. V. Kartikeyan. All rights reserved.