http://www.hindawi.com The latest articles from Hindawi Publishing Corporation © 2013 , Hindawi Publishing Corporation . All rights reserved. Wed, 08 May 2013 17:28:21 +0000 http://www.hindawi.com/journals/apec/2013/685939/ This paper introduces a new voltage-mode second-order sinusoidal generator circuit with four active elements and six passive elements, including grounded capacitors. The frequency and condition of oscillation can be independently controlled. The effect of active element’s nonidealities and parasitic effects is also studied; the proposed topology is good in absorbing several parasitic elements involved with the active elements. The circuit is advantageous for generating high frequency signals which is demonstrated for 25 MHz outputs. Several circuit extensions are also given which makes the new proposal useful for real circuit adoption. The proposed theory is validated through simulation results. Sudhanshu Maheshwari Copyright © 2013 Sudhanshu Maheshwari. All rights reserved. Mon, 29 Apr 2013 16:04:02 +0000 http://www.hindawi.com/journals/apec/2013/525017/ Nanocrystalline silicon (nc-Si) thin film transistors (TFTs) are well suited for circuit applications that require moderate device performance and low-temperature CMOS-compatible processing below 250°C. Basic logic gate circuits fabricated using ambipolar nc-Si TFTs alone are presented and shown to operate with correct outputs at frequencies of up to 100 kHz. Ring oscillators consisting of nc-Si TFT-based inverters are also shown to operate at above 20 kHz with a supply voltage of 5 V, corresponding to a propagation delay of <10 μs/stage. These are the fastest circuits formed out of nanocrystalline silicon TFTs to date. The effect of bias stress degradation of TFTs on oscillation frequency is also explored, and relatively stable operation is shown with supply voltages >5 V for several hours. Anand Subramaniam, Kurtis D. Cantley, and Eric M. Vogel Copyright © 2013 Anand Subramaniam et al. All rights reserved. Sun, 28 Apr 2013 15:58:19 +0000 http://www.hindawi.com/journals/apec/2013/720191/ Noise performance of different structures of anisotype heterojunction double-drift region (DDR) mixed tunneling and avalanche transit time (MITATT) devices has been studied. The devices are designed for operation at millimeter-wave W-band frequencies. A simulation model has been developed to study the noise spectral density and noise measure of the device. Two different mole fractions and of Ge and corresponding four types of device structure are considered for the simulation. The results show that the -Si heterojunction DDR structure of MITATT device excels all other structures as regards noise spectral density ( sec) and noise measure (33.09 dB) as well as millimeter-wave properties such as DC-to-RF conversion efficiency (20.15%) and CW power output (773.29 mW). Suranjana Banerjee, Aritra Acharyya, and J. P. Banerjee Copyright © 2013 Suranjana Banerjee et al. All rights reserved. Tue, 16 Apr 2013 11:24:31 +0000 http://www.hindawi.com/journals/apec/2013/971936/ This paper presents a new single-resistance-controlled sinusoidal oscillator (SRCO). The proposed oscillator employs only one voltage differencing differential input buffered amplifier (VD-DIBA), two resistors, and two grounded capacitors. The proposed configuration offers the following advantageous features: (i) independent control of condition of oscillation and frequency of oscillation, (ii) low active and passive sensitivities, and (iii) a very good frequency stability. The validity of the proposed SRCO has been established by SPICE simulations using 0.35 μm MIETEC technology. K. L. Pushkar, D. R. Bhaskar, and Dinesh Prasad Copyright © 2013 K. L. Pushkar et al. All rights reserved. Sun, 31 Mar 2013 08:40:46 +0000 http://www.hindawi.com/journals/apec/2013/148518/ A power efficient circuit topology is proposed to implement a low-voltage CMOS 2-input pass-transistor XOR gate. This design aims to minimize power dissipation and reduce transistor count while at the same time reducing the propagation delay. The XOR gate utilizes six transistors to achieve a compact circuit design and was fabricated using the 130 nm IBM CMOS process. The performance of the XOR circuit was validated against other XOR gate designs through simulations using the same 130 nm CMOS process. The area of the core circuit is only about 56 sq · µm with 1.5659 ns propagation delay and 0.2312 nW power dissipation at 0.8 V supply voltage. The proposed six-transistor implementation thus compares favorably with other existing XOR gate designs. Nabihah Ahmad and Rezaul Hasan Copyright © 2013 Nabihah Ahmad and Rezaul Hasan. All rights reserved. Thu, 07 Mar 2013 10:20:22 +0000 http://www.hindawi.com/journals/apec/2013/596065/ Kuan-Wei Lee, Edward Yi Chang, Yeong-Her Wang, Pei-Wen Li, and Yasuyuki Miyamoto Copyright © 2013 Kuan-Wei Lee et al. All rights reserved. Wed, 27 Feb 2013 08:16:06 +0000 http://www.hindawi.com/journals/apec/2013/948217/ This paper presents a millimeter-wave, 60 GHz frequency band planar diplexer based on substrate integrated waveguide (SIW) technology. Diplexer consists of a pair of 5th-order SIW bandpass channel filters with center frequencies at 59.8 GHz and 62.2 GHz providing 1.67% and 1.6% relative bandwidths, respectively. SIW-to-microstrip transitions at diplexer ports enable integration in a millimeter-wave transceiver front end. Measurements are in good agreement with electromagnetic simulation, reporting very good channel isolation, small return losses, and moderate insertion losses in the passbands. The proposed SIW planar diplexer is integrated into a millimeter-wave transceiver front end for 60 GHz point-to-point multigigabit wireless backhaul applications, providing high isolation between transmit and receive channels. Nikolaos Athanasopoulos, Dimitrios Makris, and Konstantinos Voudouris Copyright © 2013 Nikolaos Athanasopoulos et al. All rights reserved. Mon, 18 Feb 2013 17:17:07 +0000 http://www.hindawi.com/journals/apec/2013/627873/ We demonstrate improved device performance by applying oxide sidewall spacer technology to a block-oxide-enclosed Si body to create a fully depleted silicon-on-insulator (FDSOI) nMOSFET, which overcomes the need for a uniform ultrathin silicon film. The presence of block-oxide along the sidewalls of the Si body significantly reduces the influence of drain bias over the channel. The proposed FDSOI structure therefore outperforms conventional FDSOI with regard to its drain-induced barrier lowering (DIBL), on/off current ratio, subthreshold swing, and threshold voltage rolloff. The new FDSOI structure is in fact shown to behave similarly to an ultrathin body (UTB) SOI but without the associated disadvantages and technological challenges of the ultrathin film, because a thick Si body allows for reduced sensitivity to self-heating, thereby improving thermal stability. Jyi-Tsong Lin, Yi-Chuen Eng, and Po-Hsieh Lin Copyright © 2013 Jyi-Tsong Lin et al. All rights reserved. Tue, 25 Dec 2012 10:48:05 +0000 http://www.hindawi.com/journals/apec/2012/652478/ Based on a 1D Poissons equation resolution, we present an analytic model of inversion charges allowing calculation of the drain current and transconductance in the Metal Oxide Semiconductor Field Effect Transistor. The drain current and transconductance are described by analytical functions including mobility corrections and short channel effects (CLM, DIBL). The comparison with the Pao-Sah integral shows excellent accuracy of the model in all inversion modes from strong to weak inversion in submicronics MOSFET. All calculations are encoded with a simple C program and give instantaneous results that provide an efficient tool for microelectronics users. Hugues Murray and Patrick Martin Copyright © 2012 Hugues Murray and Patrick Martin. All rights reserved. Sun, 16 Dec 2012 08:38:50 +0000 http://www.hindawi.com/journals/apec/2012/148705/ The electrical characteristics of TiO2 films grown on III-V semiconductors (e.g., p-type InP and GaAs) by metal-organic chemical vapor deposition were studied. With (NH4)2S treatment, the electrical characteristics of MOS capacitors are improved due to the reduction of native oxides. The electrical characteristics can be further improved by the postmetallization annealing, which causes hydrogen atomic ion to passivate defects and the grain boundary of polycrystalline TiO2 films. For postmetallization annealed TiO2 on (NH4)2S treated InP MOS, the leakage current densities can reach and  A/cm2 at  MV/cm, respectively. The dielectric constant and effective oxide charges are 46 and  C/cm2, respectively. The interface state density is  cm−2 eV−1 at the energy of 0.67 eV from the edge of valence band. For postmetallization annealed TiO2 on (NH4)2S treated GaAs MOS, The leakage current densities can reach and at  MV/cm, respectively. The dielectric constant and effective oxide charges are 66 and  C/cm2, respectively. The interface state density is  cm−2 eV−1 at the energy of 0.7 eV from the edge of valence band. Ming-Kwei Lee and Chih-Feng Yen Copyright © 2012 Ming-Kwei Lee and Chih-Feng Yen. All rights reserved. Mon, 03 Dec 2012 19:19:31 +0000 http://www.hindawi.com/journals/apec/2012/459043/ This study examines the praseodymium-oxide- (Pr2O3-) passivated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) with high dielectric constant in which the AlGaN Schottky layers are treated with P2S5/(NH4)2 + ultraviolet (UV) illumination. An electron-beam evaporated Pr2O3 insulator is used instead of traditional plasma-assisted chemical vapor deposition (PECVD), in order to prevent plasma-induced damage to the AlGaN. In this work, the HEMTs are pretreated with P2S5/(NH4)2 solution and UV illumination before the gate insulator (Pr2O3) is deposited. Since stable sulfur that is bound to the Ga species can be obtained easily and surface oxygen atoms are reduced by the P2S5/(NH4)2 pretreatment, the lowest leakage current is observed in MIS-HEMT. Additionally, a low flicker noise and a low surface roughness (0.38 nm) are also obtained using this novel process, which demonstrates its ability to reduce the surface states. Low gate leakage current Pr2O3 and high-k AlGaN/GaN MIS-HEMTs, with P2S5/(NH4)2 + UV illumination treatment, are suited to low-noise applications, because of the electron-beam-evaporated insulator and the new chemical pretreatment. Chao-Wei Lin and Hsien-Chin Chiu Copyright © 2012 Chao-Wei Lin and Hsien-Chin Chiu. All rights reserved. Wed, 28 Nov 2012 08:31:26 +0000 http://www.hindawi.com/journals/apec/2012/763572/ Testing is regarded as one of the most difficult challenges for three-dimensional integrated circuits (3D ICs). In this paper, we want to optimize the cost of TAM (test access mechanism) and the test time for 3D IC. We used both greedy and simulated annealing algorithms to solve this optimization problem. We compare the results of two assumptions: soft-die mode and hard-die mode. The former assumes that the DfT of dies cannot be changed, while the latter assumes that the DfT of dies can be adjusted. The results show that thermal-aware cooptimization is essential to decide the optimal TAM and test schedule. Blindly adding TAM cannot reduce the total test cost due to temperature constraints. Another conclusion is that soft-die mode is more effective than hard-die mode to reduce the total test cost for 3D IC. Chi-Jih Shih, Chih-Yao Hsu, Chun-Yi Kuo, James Li, Jiann-Chyi Rau, and Krishnendu Chakrabarty Copyright © 2012 Chi-Jih Shih et al. All rights reserved. Wed, 14 Nov 2012 17:57:02 +0000 http://www.hindawi.com/journals/apec/2012/464659/ This paper reports a 12 GHz rotary travelling wave (RTW) voltage controlled oscillator designed in a 130 nm CMOS technology. The phase noise and power consumption performances were compared with the literature and with telecommunication standards for broadcast satellite applications. The RTW VCO exhibits a −106 dBc/Hz at 1 MHz and a 30 mW power consumption with a sensibility of 400 MHz/V. Finally, requirements are given for a PLL implementation of the RTW VCO and simulated results are presented. G. Jacquemod, F. Ben Abdeljelil, L. Carpineto, W. Tatinian, and M. Borgarino Copyright © 2012 G. Jacquemod et al. All rights reserved. Wed, 17 Oct 2012 18:00:39 +0000 http://www.hindawi.com/journals/apec/2012/359580/ In a previous study, we have demonstrated that beryllium oxide (BeO) film grown by atomic layer deposition (ALD) on Si and III-V MOS devices has excellent electrical and physical characteristics. In this paper, we compare the electrical characteristics of inserting an ultrathin interfacial barrier layer such as SiO2, Al2O3, or BeO between the HfO2 gate dielectric and Si substrate in metal oxide semiconductor capacitors (MOSCAPs) and n-channel inversion type metal oxide semiconductor field effect transistors (MOSFETs). Si MOSCAPs and MOSFETs with a BeO/HfO2 gate stack exhibited high performance and reliability characteristics, including a 34% improvement in drive current, slightly better reduction in subthreshold swing, 42% increase in effective electron mobility at an electric field of 1 MV/cm, slightly low equivalent oxide thickness, less stress-induced flat-band voltage shift, less stress induced leakage current, and less interface charge. J. H. Yum, J. Oh, Todd. W. Hudnall, C. W. Bielawski, G. Bersuker, and S. K. Banerjee Copyright © 2012 J. H. Yum et al. All rights reserved. Thu, 13 Sep 2012 17:21:37 +0000 http://www.hindawi.com/journals/apec/2012/498146/ We introduce a composite right- and left-handed travelling-wave field-effect transistor (CRLH TWFET) for developing large-scale platform to support left-handed waves. The device represents two electromagnetically coupled CRLH transmission lines by capacitance and FET transconductance. Owing to the couplings, two different modes can support waves in CRLH TWFETs. It was experimentally established that waves supported by one of the modes were amplified, while those supported by the other mode were significantly attenuated. To quantify the wave propagation in CRLH TWFETs, we developed a numerical model based on the transmission line theory that well simulated measured results. This paper discusses the results of numerical calculations that validate the design criteria of CRLH TWFETs. Koichi Narahara Copyright © 2012 Koichi Narahara. All rights reserved. Thu, 06 Sep 2012 19:07:23 +0000 http://www.hindawi.com/journals/apec/2012/309789/ Defect is one of the key factors in reducing the reliability of the insulated gate bipolar transistor (IGBT) module, so developing the diagnostic method for defects inside the IGBT module is an important measure to avoid catastrophic failure and improves the reliability of power electronic converters. For this reason, a novel diagnostic method based on the approximate entropy (ApEn) theory is presented in this paper, which can provide statistical diagnosis and allow the operator to replace defective IGBT modules timely. The proposed method is achieved by analyzing the cross ApEn of the gate voltages before and after the occurring of defects. Due to the local damage caused by aging, the intrinsic parasitic parameters of packaging materials or silicon chips inside the IGBT module such as parasitic inductances and capacitances may change over time, which will make remarkable variation in the gate voltage. That is to say the gate voltage is close coupled with the defects. Therefore, the variation is quantified and used as a precursor parameter to evaluate the health status of the IGBT module. Experimental results validate the correctness of the proposed method. Shengqi Zhou, Luowei Zhou, Suncheng Liu, Pengju Sun, Quanming Luo, and Junke Wu Copyright © 2012 Shengqi Zhou et al. All rights reserved. Tue, 28 Aug 2012 14:11:10 +0000 http://www.hindawi.com/journals/apec/2012/493239/ Reports to date of GaN HEMTs subjected to forward gate bias stress include varied extents of degradation. We report an extremely robust GaN HEMT technology that survived—contrary to conventional wisdom—high forward gate bias (+6 V) and current (>1.8 A/mm) for >17.5 hours exhibiting only a slight change in gate diode characteristic, little decrease in maximum drain current, with only a 0.1 V positive threshold voltage shift, and, remarkably, a persisting breakdown voltage exceeding 200 V. Bradley D. Christiansen, Eric R. Heller, Ronald A. Coutu Jr., Ramakrishna Vetury, and Jeffrey B. Shealy Copyright © 2012 Bradley D. Christiansen et al. All rights reserved. Thu, 09 Aug 2012 11:48:18 +0000 http://www.hindawi.com/journals/apec/2012/719376/ This paper presents a novel electronically tunable third-order sinusoidal oscillator synthesized from a simple topology, employing current-mode blocks. The circuit is realized using the active element: Current Controlled Conveyors (CCCIIs) and grounded passive components. The new circuit enjoys the advantages of noninteractive electronically tunable frequency of oscillation, use of grounded passive components, and the simultaneous availability of three sinusoidal voltage outputs. Bias current generation scheme is given for the active elements used. The circuit exhibits good high frequency performance. Nonideal and parasitic study has also been carried out. Wide range frequency tuning is shown with the bias current. The proposed theory is verified through extensive PSPICE simulations using 0.25 μm CMOS process parameters. Sudhanshu Maheshwari and Rishabh Verma Copyright © 2012 Sudhanshu Maheshwari and Rishabh Verma. All rights reserved. Tue, 24 Jul 2012 13:59:33 +0000 http://www.hindawi.com/journals/apec/2012/565827/ This paper presents a complete analysis of the kink effect in SOI MOSFET and proposes a method for eliminating kink effect observed in the current-voltage output characteristics of a partially depleted SOI MOSFET device. In this method, back oxide for the device is introduced at selected regions below the source and drain and not continuously as in an SOI device giving rise to what is termed a “SELBOX” structure. Selective back oxide structure with different gap lengths and thicknesses was studied. Results obtained through numerical simulations indicate that the proposed structure can significantly reduce the kink while still preserving major advantages offered by conventional SOI structure. Although the new structure is capable of eliminating kink, for narrow gaps the device may still exhibit some kink effect. A device model that explains the kink behavior of the structure for varying gap lengths is also developed. M. Narayanan, H. Al-Nashash, Baquer Mazhari, Dipankar Pal, and Mahesh Chandra Copyright © 2012 M. Narayanan et al. All rights reserved. Tue, 10 Jul 2012 08:00:08 +0000 http://www.hindawi.com/journals/apec/2012/926753/ Considering the variety of studies that have been reported in low-power designing era, the subthreshold design trend in Very Large Scale Integrated (VLSI) circuits has experienced a significant development in recent years. Growing need for the lowest power consumption has been the primary motivation for increase in research in this area although other goals, such as lowest energy delay production, have also been achieved through sub-threshold design. There are, however, few extensive studies that provide a comprehensive design insight to catch up with the rapid pace and large-scale implementations of sub-threshold digital design methodology. This paper presents a complete review of recent studies in this field and explores all aspects of sub-threshold design methodology. Moreover, near-threshold design and low-power pipelining are also considered to provide a general review of sub-threshold applications. At the end, a discussion about future directions in ultralow-power design is also included. Mohsen Radfar, Kriyang Shah, and Jugdutt Singh Copyright © 2012 Mohsen Radfar et al. All rights reserved. Sun, 08 Jul 2012 08:19:27 +0000 http://www.hindawi.com/journals/apec/2012/596481/ The concept of time-domain predistortion method based on raised cosine signaling is applied in real transmission channels. The proposed PWM-RC method uses raised-cosine pulse shaping instead of conventional rectangular digital signals and pulse-width modulation (PWM) scheme to achieve better output channel data response in harsh channel environment. The conventional predistortion methods based on pulse amplitude adjusting are not compatible with modern low-power CMOS design. Currently existing time-domain predistortion methods which are only based on a PWM scheme show many highfrequency signal harmonic components for both fast and slow signal transitions. It can cause more system crosstalk susceptibility if the crosstalk is dominant factor in transmission channel. In this case, the additional preemphasis boosted undesirable high-frequency components. Finally, the real channel transfer functions in connection with ADS Agilent development studio are used to compare the performance of proposed method with other predistortion methods. Bretislav Sevcik Copyright © 2012 Bretislav Sevcik. All rights reserved. Tue, 03 Jul 2012 09:17:28 +0000 http://www.hindawi.com/journals/apec/2012/834961/ A novel T-shaped piezoelectric ZnO cantilever sensor for chem/bio-detection is designed and fabricated with MEMS technology. By using Rayleigh-Ritz method, the fundamental resonant frequency formula of T-shaped cantilevers is deduced for the first time and is validated by simulation results and experimental results. From this formula, we can easily find the superiority of adopting T-shape for the cantilevers. The complete process of the cantilever sensor is then successfully developed. The cantilever sensor is actuated by a layer of high-quality ZnO film with preferred (002) orientation, which is evaluated by SEM and XRD. The key step of the process is protecting the ZnO film from KOH etching by a novel and effective method, which has rarely appeared in the literature. Finally, this cantilever sensor is measured by a network analyzer, and it has a fundamental resonant frequency of 24.60 kHz. The cantilever sensor developed in this study illustrates the feasibility and potential for many miniaturized sensor applications. Kai Yang, Zhigang Li, and Dapeng Chen Copyright © 2012 Kai Yang et al. All rights reserved. Mon, 02 Jul 2012 11:32:37 +0000 http://www.hindawi.com/journals/apec/2012/729328/ Effects of gate stack engineering and thermal treatment on electrical and interfacial properties of Ti/Pt/HfO2/InAs metal insulator semiconductor (MIS) capacitors were systematically evaluated in terms of transmission electron microscopy, energy dispersive X-ray spectroscopy, current-voltage, and capacitance-voltage characterizations. A 10 nm thick Pt metal effectively suppresses the formation of interfacial oxide, TiO2, between the Ti gate and HfO2 gate dielectric layer, enhancing the gate modulation on the surface potential of InAs. An in situ HfO2 deposition onto the n-InAs channel with an interfacial layer (IL) of one-monolayer InP followed by a 300°C post-metal-anneal produces a high-quality HfO2/InAs interface and thus unravels the annoying Fermi-level pinning, which is evidenced by the distinct capacitance dips in the high-/low-frequency C-V characteristics. The interface trap states could be further suppressed by replacing the InP IL by an As-rich InAs, which is substantiated by a gate leakage reduction and a steep voltage-dependent depletion capacitance. Chung-Yen Chien, Jei-Wei Hsu, Pei-Chin Chiu, Jen-Inn Chyi, and Pei-Wen Li Copyright © 2012 Chung-Yen Chien et al. All rights reserved. Wed, 13 Jun 2012 15:05:21 +0000 http://www.hindawi.com/journals/apec/2012/872494/ The oxygen and nitrogen were shown to diffuse through the TiN layer in the high-k/metal gate devices during PMA. Both the oxygen and nitrogen annealing will reduce the gate leakage current without increasing oxide thickness. The threshold voltages of the devices changed with various PMA conditions. The reliability of the devices, especially for the oxygen annealed devices, was improved after PMA treatments. Yi-Lin Yang, Wenqi Zhang, Chi-Yun Cheng, and Wen-kuan Yeh Copyright © 2012 Yi-Lin Yang et al. All rights reserved. Thu, 24 May 2012 14:31:35 +0000 http://www.hindawi.com/journals/apec/2012/879294/ A wireless power transfer system using an inductive link has been demonstrated for implantable sensor applications. The system is composed of two primary blocks: an inductive power transfer unit and a backward data communication unit. The inductive link performs two functions: coupling the required power from a wireless power supply system enabling battery-less, long-term implant operation and providing a backward data transmission path. The backward data communication unit transmits the data to an outside reader using FSK modulation scheme via the inductive link. To demonstrate the operation of the inductive link, a board-level design has been implemented with high link efficiency. Test results from a fabricated sensor system, composed of a hybrid implementation of custom-integrated circuits and board-level discrete components, are presented demonstrating power transmission of 125 mW with a 12.5% power link transmission efficiency. Simultaneous backward data communication involving a digital pulse rate of up to 10 kbps was also observed. M. A. Adeeb, A. B. Islam, M. R. Haider, F. S. Tulip, M. N. Ericson, and S. K. Islam Copyright © 2012 M. A. Adeeb et al. All rights reserved. Tue, 22 May 2012 14:46:31 +0000 http://www.hindawi.com/journals/apec/2012/908716/ In recent years, many articles came out where one could find the analysis of oscillatory systems of electric sinusoid signals generators with amplifiers called CFOA—current feedback operational amplifiers. As a rule, the analysis of such systems is made by applying mathematical modeling methods on the basis of the amplifier linear model, which does not allow estimating advantages and disadvantages of the systems realized with those amplifiers in comparison with classical systems. A nonlinear model of a current feedback operational amplifier (CFOA) is introduced in the paper; nonlinearity of “current mirror” is reflected in the form of current double limiting. The analysis of two known oscillatory systems has been carried out with the use of this non-linear model. Dependence between current limiting level, output voltage amplitude, and maximum oscillation frequency has been obtained. The paper shows that output current limiting under current output connection of capacitive load reduces frequency range and output voltage amplitude considerably and increases harmonic distortions in comparison with classical oscillatory systems. The research done has found that the application of new amplifiers does not give considerable advantages to the oscillatory systems with CFOA. Yuriy Konstantinovich Rybin Copyright © 2012 Yuriy Konstantinovich Rybin. All rights reserved. Sun, 29 Apr 2012 15:06:10 +0000 http://www.hindawi.com/journals/apec/2012/694105/ Remotely empowered wireless sensor networks use different energy resources including photovoltaic solar cells, wireless power transmission, and batteries. As another option the electromagnetic energy available in the ambient can be harvested to power these remote sensors. This is particularly valuable if it is desirable to harvest the ambient energy available in the wide range of electromagnetic spectrum. This has motivated the research for developing energy harvesting devices which can absorb this energy and produce a DC voltage. Rectenna, an antenna coupled with a rectifier, is the main component used for absorbing electromagnetic radiation at GHz and THz frequencies. Rectifying MIM tunnel diodes are able to operate at tens and hundreds of GHz frequency. As the preliminary steps towards development of high-frequency rectifiers, this paper presents fabrication and DC characterization of two new MIM diodes, Ti-TiO2-Al and Ti-TiO2-Pt. G-V analysis of the fabricated diodes verifies tunneling. Brinkman-Dynes-Rowell model is used to extract oxide thickness of which the derived value is around 9 nm. Ti-TiO2-Pt diode exhibits rectification ratio of 15 at 0.495 V, which is more than rectification ratio reported in earlier works. Yaksh Rawal, Swaroop Ganguly, and Maryam Shojaei Baghini Copyright © 2012 Yaksh Rawal et al. All rights reserved. Mon, 09 Apr 2012 18:40:55 +0000 http://www.hindawi.com/journals/apec/2012/610176/ A decorrelation and analog-to-digital conversion scheme aiming to reduce the power consumption of infrared image sensors is presented in this paper. To exploit both intraframe redundancy and inherent photon shot noise characteristics, a column based 1D Haar analog wavelet transform combined with variable gain amplification prior to A/D conversion is used. This allows to use only an 11-bit ADC, instead of a 13-bit one, and to save 15% of data transfer. An 8×16 pixels test circuit demonstrates this functionality. P. Villard, T. Thabuis, M. Belleville, G. Sicard, G. Decaens, and M. Zecri Copyright © 2012 P. Villard et al. All rights reserved. Sun, 08 Apr 2012 14:04:58 +0000 http://www.hindawi.com/journals/apec/2012/181395/ Low-power operations can be great advantageous for ReRAM devices. However, wasteful overwriting such as the SET operation to low-resistance state (LRS) device and the RESET operation to high-resistance state (HRS) device causes not only an increase in power but also the degradation of the write cycles due to repeatedly rewriting. Thus, in this paper, we proposed a novel automatic avoidance circuit for dealing with wasteful overwriting that uses a sense amplifier and estimated the energy consumption reduction rate by conducting a circuit simulation. As a result, this circuit helped to reliably avoid the wasteful overwriting operation to reduce about 99% and 97% of wasteful energy using VSRC and CSRC, respectively. Takaya Handa, Yuhei Yoshimoto, Kazuya Nakayama, and Akio Kitagawa Copyright © 2012 Takaya Handa et al. All rights reserved. Wed, 04 Apr 2012 11:57:10 +0000 http://www.hindawi.com/journals/apec/2012/276145/ An analytical model of the silicon on insulator photoactivated modulator (SOI-PAM) device is presented in order to describe the concept of this novel device in which the information is electronic while the modulation command is optical. The model, relying on the classic Shockley’s analysis, is simple and useful for analyzing and synthesizing the voltage-current relations of the device at low drain voltage. Analytical expressions were derived for the output current as function of the input drain and gate voltages with a parameterization of the physical values such as the doping concentrations, channel and oxide thicknesses, and the optical control energy. A prototype SOI-PAM device having an area of 4 μm × 3 μm with known parameters is used to experimentally validate and support the model. Finally, the model allows the understanding of the physical mechanisms inside the device for both dark and under illumination conditions, and it will be used to optimize and to find the performance limits of the device. Doron Abraham, Avraham Chelly, David Elbaz, Shimron Schiff, Michah Nabozny, and Zeev Zalevsky Copyright © 2012 Doron Abraham et al. All rights reserved.