]>A Polyadic pi-Calculus Approach for the Formal Specification of UML-RT : Table 4
Table 4: Pseudocode of the transitions in the capsule TopSystem and its subcapsules.

CapsuleTransitionTrigger pseudocodeAction pseudocode

TopSystemInitialsetCT send portName( 𝑥 )
setET send portName ( 𝑞 )

SourceInitial
timeouttimer receive timeout( )
sendPortX 𝑦 send portName( 𝑟 )
sendPortY 𝑎 send portName( 𝑎 )
timeout2

RouterInitial
receivePort ( 𝑏 1 , 𝑏 2 ) receive portName( 𝑠 )alert = 𝑠
sendMsgtimer receive timeout( )alert send msg ( 𝑐 1 , 𝑐 2 )
waitPorttimer receive timeout( )

ConsumerTargetInitial
configPortsetPort receive portName (aux) 𝑡 = aux
consumeMsg 𝑡 receive msg ( 𝑑 1 , 𝑑 2 )
waitMsgtimer receive timeout( )

ExporterConsumerInitial
configPortsetPort receive portName(aux) 𝑑 1 = aux
Initial1
Initial2
receiveMsg 𝜋 receive msg 𝜋
consumeMsg
exportMsgexport send msg( [ ] [ ] ) 𝑆 𝑜 𝑢 𝑟 𝑐 𝑒 ( 𝐼 𝑛 𝑝 𝑢 𝑡 𝑆 𝑒 𝑡 𝑆 𝑜 𝑢 𝑟 𝑐 𝑒 ) = 𝑛 𝑒 𝑤 ( 𝑅 𝑒 𝑠 𝑡 𝑟 𝑖 𝑐 𝑡 𝑒 𝑑 𝑆 𝑒 𝑡 𝑆 𝑜 𝑢 𝑟 𝑐 𝑒 ( 𝑆 𝑜 𝑢 𝑟 𝑐 𝑒 _ 𝑆 𝑡 𝑟 𝑢 𝑐 𝑡 𝑢 𝑟 𝑒 𝐷 𝑖 𝑎 𝑔 𝑟 𝑎 𝑚 𝑆 𝑜 𝑢 𝑟 𝑐 𝑒 _ 𝑆 𝑡 𝑎 𝑡 𝑒 𝐷 𝑖 𝑎 𝑔 𝑟 𝑎 𝑚 ) , ( 3 6 ) )
msgConsumed
msgExported
waitMsgtimer receive timeout( )