Table 2: Area and timing statistics from UMC 65 nm technology implementation.

Area/time statisticMassively parallel, initial scheduleMassively parallel, PARCS scheduleFSM + datapath, initial scheduleFSM + datapath, PARCS schedule

Area in square nm117486114579111025107242
Equivalent number of NAND2 gates91876895158673883783
Achievable clock period2 ns2 ns2 ns2 ns
Achievable clock frequency500 MHz500 MHz500 MHz500 MHz