Reduced Precision Redundancy for Satellite Telecommand Receiver Module on FPGA

Table 2

Resource comparison of TMR and RPR + TMR on VIRTEX 4.

Logic utilization	TMR	RPR + TMR	Available	Resource reduction (%)
	Used	Used
Slice	2,572	1,901	24,576	26.08
Slice flip flops	3,149	1,817	49,152	42.29
4-input LUTS	2,721	2,240	49,152	17.68