Optimization and Implementation of Scaling-Free CORDIC-Based Direct Digital Frequency Synthesizer for Body Care Area Network Systems

Table 1

The hardware costs in 16-bit DDFS with respect to the number of the replaced CORDIC stages (𝑚: the number of the replaced CORDIC stages, 16-bit adder: 200 gates, 16-bit shift: 90 gates, and 1-bit ROM: 1 gate).

𝑚	0	1	2	3	4	5	6	7
CORDIC processor requirement:
CORDIC processor-A	7	5	4	3	2	1	0	0
CORDIC processor-B	9	9	9	9	9	9	9	8
Hardware cost:
16-bit Adders	46	38	34	30	26	22	18	16
16-bit Shifters	46	38	34	30	26	22	18	16
ROM size (bits)	4 × 16	8 × 16	14 × 16	26 × 16	50 × 16	102 × 16	194 × 16	386 × 16
Total gate counts	13404	11148	10084	9116	8340	8012	8324	10816