Design and Architectures for Signal and Image Processing
Call for Papers
The development of complex applications involving signal, image, and control processing is classically divided into three consecutive steps: a theoretical study of the algorithms, a study of the target architecture, and finally the implementation.
Today such sequential design flow is reaching its limits due to:
- The complexity of today�s systems designed with the emerging submicron technologies for integrated circuit manufacturing
- The intense pressure on the design cycle time in order to reach shorter time-to-market, reduce development and production costs
- The strict performance constraints that have to be reached in the end, typically low and/or guaranteed application execution time, integrated circuit area, overall system power dissipation
An Alternative approach to a traditional design flow, called algorithm-architecture matching, aims to leverage the design flow by a simultaneous study of both algorithmic and architectural issues, taking into account multiple design constraints, as well as algorithm and architecture optimizations, not only in the beginning but all the way throughout the design process.
Introducing such design methodology is also necessary when facing the new emerging applications such as high-performance, low-power, low-cost mobile communication systems and/or smart sensors-based systems.
This design methodology will have to face also future architectures based on multiple processor cores and dedicated coprocessors to achieve the required efficiency. NoC-based communications will become also mandatory for many applications to enable parallel interconnections and communication throughputs. Adaptive and reconfigurable architectures represent a new computation paradigm whose trend is clearly increasing.
This forms a driving force for the future evolution of embedded system designs methodologies.
This special issue of the EURASIP Journal of Embedded Systems is intended to present innovative methods, tools, design methodologies, and frameworks for algorithm-architecture matching approach in the design flow including system level design and hardware/software codesign, RTOS, system modeling and rapid prototyping, system synthesis, design verification and performance analysis and estimation. Because in such design methodology the system is seen as a whole, this special issue will also cover the following topics:
- New and emerging architectures: SoC, MPSoC, configurable computing (ASIPs), (dynamically) reconfigurable systems using FPGAs
- Smart sensors: audio and image sensors for high performance and energy efficiency
- Applications: Automotive, medical, multimedia, telecommunications, ambient intelligence, object recognition, cryptography, wearable computing
This special issue is open to all contributions. Authors are invited to submit their papers addressing the domain of design and architectures for signal and image processing. We also strongly encourage authors who presented a paper to the DASIP 2007 workshop to submit an extended version of their original workshop contributions.
Authors should follow the EURASIP Journal on Embedded Systems manuscript format described at the journal site http://www.hindawi.com/journals/es/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/ according to the following timetable:
| Manuscript Due | March 1, 2008 |
| First Round of Reviews | June 1, 2008 |
| Publication Date | September 1, 2008 |
Guest Editors
- Markus Rupp, Institute of Communications and Radio-Frequency Engineering (INTHFT), Technical University of Vienna, 1040 Vienna, Austria
- Dragomir Milojevic, BEAMS, Université Libre de Bruxelles, CP165/56, 1050 Bruxelles, Belgium
- Guy Gogniat, LESTER Laboratory, University of South Brittany, FRE 2734 CNRS, 56100 Lorient, France