A Process Optimization Method of the Mini-LOCOS Field Plate Profile for Improving Electrical Characteristics of LDMOS Device

Table 2

Electrical parameter for 130–350 nm LDMOS devices with mini-LOCOS field plate.

Ref. [18]—350 nm; “abrupt” (suspicion)		Ref. [19]—130 nm; “abrupt”(suspicion)		Ref. [20]—180 nm; “abrupt” (suspicion)		Can.-FAB -153 nm; “abrupt” (TEM)		Can.-FAB -153 nm “smooth”(TEM)
Ron,sp	BVds,max	Ron,sp	BVds,max	Ron,sp	BVds,max	Ron,sp	BVds,max	Ron,sp	BVds,max
m	V	m	V	m	V	m	V	m	V
8	22	5	17.9	3.7	14.3	3.8	14	3.7	15.1
11	27	7.1	22	5.2	17	5.1	20.5	5.4	21.3
12.4	31	7.9	30	8.7	27.2	7.3	23	6.9	24.8
14.9	36	11.3	35	13	37.4	11.9	34	11.3	37.4
18	45	16.2	45.7	22.9	48.2	18.2	44	16.5	49.3