Research Article

Digital Architectures for UWB Beamforming Using 2D IIR Spatio-Temporal Frequency-Planar Filters

Table 4

Hardware resource consumptions for pipelined 2nd-order beam filter with 3-stage SLA for different word lengths for 20 PPCMs.

( )
FPGA source consumptions
(ns) (MHz) Slice Reg.s LUTs FFs

9.220 106.757 54,235 188,387 54,215
8.945 108.968 54,048 179,186 53,969
8.749 111.271 51,926 165,477 51,776
8.654 113.960 47,707 155,265 47,707
8.442 116.536 41,103 120,694 41,065
8.297 119.360 41,103 120,431 41,065