Full-Wave Analysis of Traveling-Wave Field-Effect Transistors Using Finite-Difference Time-Domain Method

Abstract

Nonlinear transmission lines, which define transmission lines periodically loaded with nonlinear devices such as varactors, diodes, and transistors, are modeled in the framework of finite-difference time-domain (FDTD) method. Originally, some root-finding routine is needed to evaluate the contributions of nonlinear device currents appropriately to the temporally advanced electrical fields. Arbitrary nonlinear transmission lines contain large amount of nonlinear devices; therefore, it costs too much time to complete calculations. To reduce the calculation time, we recently developed a simple model of diodes to eliminate root-finding routines in an FDTD solver. Approximating the diode current-voltage relation by a piecewise-linear function, an extended Ampere's law is solved in a closed form for the time-advanced electrical fields. In this paper, we newly develop an FDTD model of field-effect transistors (FETs), together with several numerical examples that demonstrate pulse-shortening phenomena in a traveling-wave FET.

1. Introduction

The generation of a short electrical pulse with picosecond duration is one of the keys to producing a breakthrough in high-speed electronics. The applications of short pulses include measurement systems with picosecond temporal resolution, over-100-Gbit/s communication systems, and submillimeter-to-teraherz imaging systems [1]. We recently found that a transmission line periodically loaded with resonant tunneling diodes (RTDs) greatly compresses the temporal width of the pulse input to it [2]. Once the input pulse crosses the peak voltage of the loaded RTDs, the exponential wave is developed at voltages smaller than the peak voltage, and the sinusoidal wave is coupled to it at larger voltages, whose wave number becomes much larger than that of the input; therefore, the input pulse experiences significant shortening. The similar pulse shortening can be realized in traveling-wave field-effect transistors (TWFETs). A TWFET is a special type of FET whose electrodes are employed not only as electrical contacts but also as transmission lines [3]. We consider the case where a decreasing voltage pulse is applied to the gate line and an increasing one is simultaneously applied to the drain line. By properly designing the top and bottom levels of the applied pulses, every FET simulates an electronic switch (the switch is open for voltages greater than some fixed threshold, and closed otherwise). This arrangement guarantees the pulse shortening owing to the development of the exponential-sinusoidal waves as observed in an RTD line [4].

In order to evaluate the above-mentioned results in monolithically integrated devices, we have to develop the models of nonlinear devices such as RTDs and FETs for use in a finite-difference time-domain (FDTD) electromagnetic solver [5]. In FDTD-based solvers of Maxwell’s equations, a circuit element such as a capacitor, an inductor, or a nonlinear device, is usually implemented in an extended Ampere’s law as a field-dependent conductance/capacitance in a single Yee cell [6]. Unfortunately, it requires some root-finding routine such as the Newton-Raphson method to solve it to obtain the temporal advanced electrical fields for numerical stability [7]. The situation becomes more cumbersome, when the physical extent of devices cannot be ignored. Because we have to evaluate several adjacent cells for the terminal voltages that determine the device operation, a root-finder for multiple-variable functions is needed, which is very time-consuming. Moreover, we consider nonlinear transmission lines, which generally include numerous nonlinear devices.

Recently, we developed a concise model of nonlinear devices that contributes to eliminating the time-consuming root-finding procedures mentioned above. It approximates the voltage dependence of the device current by a piecewise-linear function and solves an extended Ampere’s law in a closed form. Actually, we successfully demonstrated an FDTD calculation of the pulse shortening in an RTD line [8]. The similar modeling can be applied not only for diodes but also for three-terminal devices such as FETs. Based on our strategy, we first discuss an FDTD model of FETs after giving brief reviews and then show the results of full-wave calculations that demonstrate the pulse compression in a TWFET.

2. Diode Model in FDTD

When the conduction current density flowing in the device is denoted by 𝐉_𝐿, the temporal evolution of the electromagnetic fields is calculated on the basis of an extended Ampere’s law as𝜕𝐄=1𝜕𝑡𝜖1∇×𝐇−𝜖𝐉_𝐿, (1) where 𝐄, 𝐇, and 𝜖 are the electric field, magnetic field, and dielectric constant, respectively. By the single-cell implementation of the lumped device, (1) is converted as follows: 𝐸^𝑛_𝑦=𝐸^𝑛_𝑦⁻¹+Δ𝑡𝜖∇×𝐇^𝑛−1/2_𝑦−Δ𝑡𝐼𝜖Δ𝑥Δ𝑧^𝐿𝑉_𝐿^𝑛−1/2, (2) where Δ𝑥, Δ𝑧, and Δ𝑡 show the cell size in 𝑥, 𝑧, and 𝑡 directions, respectively. The superscripts show the temporal positions, by which we represent the alternative evaluations of electrical and magnetic fields in FDTD. Moreover, 𝐼_𝐿 and 𝑉_𝐿 show the device current and terminal voltage, respectively. The current is assumed to flow in the 𝑦 direction and is equal to |𝐉_𝐿|Δ𝑥Δ𝑧. Moreover, 𝑉_𝐿 is given by 𝐸_𝑦Δ𝑦 at the cell corresponding to the device. Thus, (2) becomes𝐸^𝑛_𝑦=𝐸_𝑦^𝑛−1+Δ𝑡𝜖∇×𝐇^𝑛−1/2_𝑦−Δ𝑡𝐼𝜖Δ𝑥Δ𝑧^{𝐿𝑛−1/2}𝐸^𝑛_𝑦. (3) As mentioned above, the argument of 𝐼_𝐿 is evaluated at time 𝑛 for numerical stability. When a device occupies 𝑁 adjacent cells, the difference equations to be solved become𝐸^𝑛_𝑦[𝑖]=𝐸_𝑦^𝑛−1[𝑖]+Δ𝑡𝜖∇×𝐇^𝑛−1/2[𝑖]_𝑦−Δ𝑡𝐼𝜖Δ𝑥Δ𝑧^{𝐿𝑛−1/2}𝐸^𝑛_𝑦[1],𝐸^𝑛_𝑦[2],…,𝐸^𝑛_𝑦[𝑁(),]𝑖=1,2,…,𝑁 (4) where 𝑋[𝑖](𝑋=𝐸_𝑦,𝐇) represents the field at the 𝑖th cell occupied by the device.

To solve (4) explicitly, we approximate the voltage dependence of the device current by a piecewise-linear function. The key is the fact that 𝐸^𝑛_𝑦[𝑖] is solved by hand in (4), when 𝐼_𝐿^𝑛−1/2 is a linear function of the arguments. Setting 𝐼_𝑗≡𝐼_𝐿(𝑉_𝑗) for 𝑀 different voltages 𝑉_𝑗, (𝑗=1,…,𝑀), 𝐼_𝐿 is approximated by the following piecewise-linear function:𝐼_𝐿(𝑉)=𝐼_𝑗+1−𝐼_𝑗𝑉_𝑗+1−𝑉_𝑗𝑉−𝑉_𝑗+𝐼_𝑗, (5) where 𝑉∈(𝑉_𝑗,𝑉_𝑗+1] for 𝑗=1,…𝑀−1. Substituting (5) into 𝐼_𝐿 in (4) and setting 𝑉=Δ𝑦∑^𝑁_𝑘=1𝐸^𝑛_𝑦[𝑘], we obtain𝐸^𝑛_𝑦[𝑖]=𝐸_𝑦^𝑛−1[𝑖]+Δ𝑡𝜖∇×𝐇^𝑛−1/2[𝑖]_𝑦−𝛼_𝑗^𝑁_𝑘=1𝐸^𝑛_𝑦[𝑘]−𝛽_𝑗, (6) where𝛼_𝑗=Δ𝑡Δ𝑦𝐼𝜖Δ𝑥Δ𝑧^𝑗+1−𝐼_𝑗𝑉_𝑗+1−𝑉_𝑗,𝛽_𝑗=Δ𝑡𝐼𝜖Δ𝑥Δ𝑧^𝑗𝑉_𝑗+1−𝐼_𝑗+1𝑉_𝑗𝑉_𝑗+1−𝑉_𝑗. (7)

By straightforward calculations, (6) is solved with respect to 𝐸^𝑛_𝑦[𝑖] to give𝐄^𝑛_𝑦=𝐀𝑗⁻¹𝐒𝑗, (8)𝐴𝑗_𝑘𝑙=𝛿_𝑘𝑙+𝛼_𝑗, (9)𝑆𝑗_𝑘=𝐸_𝑦^𝑛−1[𝑘]+Δ𝑡𝜖(∇×𝐇[𝑘])_𝑦−𝛽_𝑗, (10) where 𝐄^𝑛_𝑦 shows the column vector (𝐸^𝑛_𝑦[1],𝐸^𝑛_𝑦[2],…,𝐸^𝑛_𝑦[𝑁])^𝑇. Moreover, 𝐴[𝑗]_𝑘𝑙,(𝑘,𝑙=1,2,…,𝑁) and 𝑆[𝑗]_𝑘,(𝑘=1,2,…,𝑁) show the (𝑘,𝑙)th entry of 𝐀[𝑗] and the 𝑘th component of 𝐒[𝑗], respectively. Note that 𝐀[𝑗]⁻¹ is obtained in a closed form as𝐴𝑗⁻¹_𝑘𝑙=𝛿_𝑘𝑙−𝛼_𝑗1+𝑁𝛼_𝑗. (11) After obtaining 𝐸^𝑛_𝑦[𝑖] using (8), we have to check if the terminal voltage 𝑉 is really in the range (𝑉_𝑗,𝑉_𝑗+1] with 𝑉=Δ𝑦∑^𝑁_𝑖=1𝐸^𝑛_𝑦[𝑖]. If not, the procedure is repeated with other 𝑗 values, until 𝑉∈(𝑉_𝑗,𝑉_𝑗+1]. The presented diode model successfully demonstrated the wave properties traveling in an RTD transmission line [8, 9].

3. FET Model in FDTD

There are many different equivalent circuits of an FET, depending on the accuracy and the application to use. For clarity, we first consider the simplest representation: an FET is represented only by the drain-source current 𝐼_DS as a function of both the gate-source and drain-source voltages. Then, an extended Ampere’s law is given by𝐸^𝑛_𝑦=𝐸_𝑦^𝑛−1+Δ𝑡𝜖∇×𝐇^𝑛−1/2_𝑦−Δ𝑡𝐼𝜖Δ𝑥Δ𝑧^𝑛−1/2DS𝑉_GS,𝑉_DS, (12) where 𝑉_GS and 𝑉_DS represent the gate-source and drain-source voltages, respectively. Again, the current is assumed to flow in the 𝑦 direction. The adjacent 𝑀_D cells are used for calculating 𝑉_DS. Moreover, the electrical field components used for 𝑉_DS are denoted by 𝐸_𝑦[1],…,𝐸_𝑦[𝑀_D]. The difference equations to be solved become𝐸^𝑛_𝑦[𝑖]=𝐸_𝑦^𝑛−1[𝑖]+Δ𝑡𝜖∇×𝐇^𝑛−1/2[𝑖]_𝑦−Δ𝑡𝐼𝜖Δ𝑥Δ𝑧^𝑛−1/2DS𝑉_GS,Δ𝑦^𝑀D_𝑘=1𝐸^𝑛_𝑦[𝑘]𝑖=1,2,…,𝑀_D. (13)

At this point, we approximate the voltage dependence of 𝐼_DS by a piecewise-linear function and solve algebraically (13) with respect to 𝐸^𝑛_𝑦[𝑖] (𝑖=1,…,𝑀_D). The procedure is similar to the above-mentioned diode case, except that 𝑉_GS must be upgraded by corresponding electrical field components at time 𝑛.

Next, we consider more practical FET models shown in Figure 1(a), called the Statz model [10]. The model takes the gate-source, gate-drain currents together with the drain-source current into consideration. Moreover, the parasitic resistances and capacitances are also modeled. The device current-voltage relationships are given by𝐼^𝑛−1/2_G=−𝑟_s𝑉^𝑛_DS−𝑥^𝑛_ds+𝑟_s+𝑟_d𝑉^𝑛_GS−𝑥^𝑛_gs𝑟_g𝑟_s+𝑟_s𝑟_d+𝑟_d𝑟_g,𝐼^𝑛−1/2_D=𝑟_s+𝑟_g𝑉^𝑛_DS−𝑥^𝑛_ds−𝑟_s𝑉^𝑛_GS−𝑥^𝑛_gs𝑟_g𝑟_s+𝑟_s𝑟_d+𝑟_d𝑟_g,𝐼^𝑛−1/2_S=𝐼^𝑛−1/2_G+𝐼^𝑛−1/2_D, (14) where 𝐼_G, 𝐼_D, and 𝐼_S represent the gate, drain, and source currents, respectively. The auxiliary voltage variables 𝑥_gs and 𝑥_ds are solved with respect to 𝑉_GS and 𝑉_DS by the following expressions resulting from Kirchhoff’s law:𝐼^𝑛−1/2_S=𝐼_DS𝑥^𝑛_gs,𝑥^𝑛_ds+𝐶_DS𝑥^𝑛_ds−𝑥^𝑛−1_dsΔ𝑡+𝐼_GS𝑥^𝑛_gs+𝐶_GS𝑥^𝑛_gs𝑥^𝑛_gs−𝑥^𝑛−1_gs,𝐼Δ𝑡_𝑛−1/2D=𝐼_DS𝑥^𝑛_gs,𝑥^𝑛_ds+𝐶_DS𝑥^𝑛_ds−𝑥^𝑛−1_dsΔ𝑡−𝐼_GD𝑥^𝑛_gs,𝑥^𝑛_ds+𝐶_GD𝑥^𝑛_gs,𝑥^𝑛_ds𝑥^𝑛_ds−𝑥^𝑛_gs−𝑥^𝑛−1_ds+𝑥^𝑛−1_gs.Δ𝑡 (15) For definiteness, we assume that the adjacent 𝑀_G cells are used to evaluate 𝑉_GS and adjacent 𝑀_D cells are for 𝑉_DS. Moreover, the gate and drain currents are assumed to flow the former 𝑀_G and the latter 𝑀_D cells, respectively. Then, we denote the electrical field components used for 𝑉_GS as 𝐸_𝑦[1],…,𝐸_𝑦[𝑀_G], and the symbols 𝐸_𝑦[𝑀_G+1],…,𝐸_𝑦[𝑀_G+𝑀_D] are reserved for those representing 𝑉_DS. The difference equations to be solved become𝐸^𝑛_𝑦[𝑖]=𝐸_𝑦^𝑛−1[𝑖]+Δ𝑡𝜖∇×𝐇^𝑛−1/2[𝑖]_𝑦−Δ𝑡𝐼𝜖Δ𝑥Δ𝑧^{𝑋𝑛−1/2}𝑉_GS,𝑉_DS, (16) where 𝐼_𝑋 represents 𝐼_G(𝐼_D) for 𝑖=1,…,𝑀_G(𝑖=𝑀_G+1,…,𝑀_G+𝑀_D).

(a)

(b)

Figure 1 

FET model in FDTD. (a) The Statz model and (b) A triangulation of 𝑉GS−𝑉DS plane.

To obtain a piecewise-linear function that approximates the device currents, we triangulate the 𝑉_GS−𝑉_DS plane. For the present device currents, a simple triangulation shown in Figure 1(b) suffices. Setting 𝐼_{G(D),𝑖,𝑗}≡𝐼_G(D)(𝑉_GS,𝑖,𝑉_DS,𝑗) for 𝑀_G×𝑀_D different voltages (𝑉_GS,𝑖,𝑉_DS,𝑗),(𝑖=1,…,𝑀_G,𝑗=1,…,𝑀_D), 𝐼_𝑋(𝑋=G,D) is approximated by the following piecewise-linear function for (𝑉_GS,𝑉_DS)∈𝑆_𝑖,𝑗 in Figure 1(b):𝐼_𝑋𝑉_GS,𝑉_DS=𝐼_{𝑋,𝑖+1,𝑗}−𝐼_{𝑋,𝑖,𝑗}𝑉_GS,𝑖+1−𝑉_GS,𝑖𝑉_GS−𝑉_GS,𝑖+𝐼_{𝑋,𝑖,𝑗+1}−𝐼_{𝑋,𝑖,𝑗}𝑉_DS,𝑗+1−𝑉_DS,𝑗𝑉_DS−𝑉_DS,𝑗+1+𝐼_{𝑋,𝑖,𝑗+1}. (17) On the other hand, for (𝑉_GS,𝑉_DS)∈𝑇_𝑖,𝑗 in Figure 1(b), it is𝐼_𝑋𝑉_GS,𝑉_DS=𝐼_{𝑋,𝑖+1,𝑗}−𝐼_{𝑋,𝑖,𝑗}𝑉_GS,𝑖+1−𝑉_GS,𝑖𝑉_GS−𝑉_GS,𝑖+1+𝐼_{𝑋,𝑖,𝑗+1}−𝐼_{𝑋,𝑖,𝑗}𝑉_DS,𝑗+1−𝑉_DS,𝑗𝑉_DS−𝑉_DS,𝑗+𝐼_{𝑋,𝑖+1,𝑗}. (18) Hereafter, we denote the piecewise-linear counterparts of 𝐼_D(G) as 𝐼_D(G)=𝑎_{D(G),𝑖𝑗}𝑉_GS+𝑏_{D(G),𝑖𝑗}𝑉_DS+𝑐_{D(G),𝑖𝑗} for convenience. Substituting them into 𝐼_D,G in (16), we obtain𝐸^𝑛_𝑦[𝑖]=𝐸_𝑦^𝑛−1[𝑖]+Δ𝑡𝜖∇×𝐇^𝑛−1/2[𝑖]_𝑦−Δ𝑡×𝑎𝜖Δ𝑥Δ𝑧_{𝑋,𝑗𝑘}Δ𝑦^𝑀G_𝑙=1𝐸^𝑛_𝑦[𝑙]+𝑏_{𝑋,𝑗𝑘}Δ𝑦^𝑀G+𝑀D_𝑙=𝑀G𝐸^𝑛_𝑦[𝑙]+𝑐_{𝑋,𝑗𝑘}, (19) where 𝑋 has to set to G and D for 𝑖=[1,…,𝑀_G] and 𝑖=𝑀_G+1,…,𝑀_G+𝑀_D, respectively.

We again obtain the column vector 𝐄^𝑛_𝑦=(𝐸^𝑛_𝑦[1],…,𝐸^𝑛_𝑦[𝑀_G],𝐸^𝑛_𝑦[𝑀_G+1],…,𝐸^𝑛_𝑦[𝑀_G+𝑀_D])^𝑇 in the form of 𝐄^𝑛_𝑦=𝐀[𝑗𝑘]⁻¹𝐒[𝑗𝑘]. The 𝑙th component of 𝐒[𝑗𝑘] is given by𝑆𝑗𝑘_𝑙=𝐸_𝑦^𝑛−1[𝑙]+Δ𝑡𝜖(∇×𝐇[𝑙])_𝑦−𝛾_{𝑋,𝑗𝑘}, (20) where 𝛾_{𝑋,𝑗𝑘} represents 𝑐_G,𝑗𝑘Δ𝑡/𝜖Δ𝑥Δ𝑧 for 𝑖=1,…,𝑀_G, and 𝑐_D,𝑗𝑘Δ𝑡/𝜖Δ𝑥Δ𝑧 for 𝑖=𝑀_G+1,…,𝑀_G+𝑀_D. Moreover, the matrix 𝐀[𝑗𝑘] is given by𝐴𝑗𝑘_𝑙𝑚=𝛿_𝑙𝑚+𝛼_G,𝑗𝑘,(𝑙,𝑚)∈1,𝑀_G,𝛿_𝑙𝑚+𝛽_D,𝑗𝑘,(𝑙,𝑚)∈𝑀_G+1,𝑀_G+𝑀_D,𝛽_G,𝑗𝑘,𝑙∈1,𝑀_G,𝑚∈𝑀_G+1,𝑀_G+𝑀_D,𝛼_D,𝑗𝑘,𝑙∈𝑀_G+1,𝑀_G+𝑀_D,𝑚∈1,𝑀_G, (21) where 𝛼_G,D,𝑗𝑘≡𝑎_G,D,𝑗𝑘Δ𝑡Δ𝑦/𝜖Δ𝑥Δ𝑧 and 𝛽_G,D,𝑗𝑘≡𝑏_G,D,𝑗𝑘Δ𝑡Δ𝑦/𝜖Δ𝑥Δ𝑧. For the present case, 𝐀[𝑗𝑘]⁻¹ is explicitly given asℎ_𝑙𝑚𝐴𝑗𝑘⁻¹_𝑙𝑚=1+𝑀_D𝛽_D,𝑗𝑘1+𝑀_G𝛼_G,𝑗𝑘−𝑀_G𝑀_D𝛼_D,𝑗𝑘𝛽_G,𝑗𝑘𝛿_𝑙𝑚−1+𝑀_D𝛽_D,𝑗𝑘𝛼_G,𝑗𝑘+𝑀_D𝛽_G,𝑗𝑘𝛼_D,𝑗𝑘,(𝑙,𝑚)∈1,𝑀_G,1+𝑀_D𝛽_D,𝑗𝑘1+𝑀_G𝛼_G,𝑗𝑘−𝑀_G𝑀_D𝛼_D,𝑗𝑘𝛽_G,𝑗𝑘𝛿_𝑙𝑚−1+𝑀_G𝛼_G,𝑗𝑘𝛽_D,𝑗𝑘+𝑀_G𝛼_D,𝑗𝑘𝛽_G,𝑗𝑘,(𝑙,𝑚)∈𝑀_G+1,𝑀_G+𝑀_D,−𝛽_G,𝑗𝑘,𝑙∈1,𝑀_G,𝑚∈𝑀_G+1,𝑀_G+𝑀_D,−𝛼_D,𝑗𝑘,𝑙∈𝑀_G+1,𝑀_G+𝑀_D,𝑚∈1,𝑀_G, (22)where ℎ_𝑙𝑚=(1+𝑀_D𝛽_D,𝑙𝑚)(1+𝑀_G𝛼_G,𝑙𝑚)−𝑀_G𝑀_D𝛽_G,𝑙𝑚𝛼_D,𝑙𝑚. After obtaining 𝐸^𝑛_𝑦[𝑖], we have to check if the terminal voltages 𝑉_GS and 𝑉_DS are really in the range we presume. Otherwise, the procedure is repeated with coefficients corresponding to another triangularized regions in 𝑉_GS−𝑉_DS plane. Moreover, when the device model includes capacitors such as 𝐶_GS and 𝐶_GD, these terminal voltages must be recorded, which are required for evaluating 𝑥^𝑛−1_ds and 𝑥^𝑛−1_gs in (15).

In the following, we demonstrate the pulse shortening in TWFETs by FDTD calculations. Although the line structure we set up is rather impractical, we successfully observed the shortening of the pulse traveling along a TWFET. It is observed, only when the nonlinear operations of a large amount of FETs are properly simulated. We thus believe that this example calculation clarifies the validity of our models. Before showing calculation results, we briefly review the mechanism of the pulse shortening in TWFETs.

4. Pulse Shortening in TWFETs

Figure 2(a) shows the equivalent representation of a TWFET. One end of each electrode line labeled as 𝑉_gin(𝑉_din) is for signal applications. Figure 2(b) shows the required pulse shapes applied at 𝑉_gin(𝑉_din). The voltages biasing the gate and drain lines are denoted by 𝑉_G1 and 𝑉_D1, respectively. The drain pulse has the opposite parity to the gate pulse. Moreover, the top and bottom voltage levels of the drain (gate) pulse are set to 𝑉_D2 (𝑉_G1) and 𝑉_D1 (𝑉_G2), respectively. At this point, 𝑉_G2 is set below the FET threshold voltage 𝑉_TO, and both of 𝑉_D1 and 𝑉_G1 are set to approximately 0 V. The thin curves in Figure 2(c) show the drain current-voltage relationships for several different gate bias voltages. The uppermost and lowermost curves correspond to the relationships for 𝑉_G1 and 𝑉_G2, respectively. Because of the presence of electromagnetic couplings between the gate and drain lines, two different propagation modes, called the 𝑐 mode and the 𝜋 mode [11], are developed on a TWFET. We can design a TWFET to amplify only the pulses carried by one of the two modes and attenuate the pulses carried by the other mode [4]. The conditions are given by simple inequalities using three variables 𝑢_s, 𝑢_𝑐, and 𝑢_𝜋 defined as𝑢_s=𝐿_𝑚𝐶_gd𝐿_g𝐿_d−𝐿²_𝑚,𝑢_𝑐,𝜋=𝑋₁±𝑋²₁−2𝑋₂𝑋₂, (23) where the upper (lower) signs are for 𝑐 (𝜋) mode. Moreover, we used two variables 𝑋_1,2 for brevity: 𝑋₁=𝐶_gs𝐿_g+𝐶_ds𝐿_d+𝐶_gd(𝐿_g+𝐿_d)−2𝐶_gd𝐿_𝑚 and 𝑋₂=2(𝐶_gs𝐶_ds+𝐶_gs𝐶_gd+𝐶_ds𝐶_gd)(𝐿_g𝐿_d−𝐿²_𝑚). It is then found that the 𝑐-mode pulse is generically amplified when 𝑢_s>𝑢_𝑐, while the 𝜋-mode pulse is amplified when 𝑢_s<𝑢_𝜋. Because 𝑢_𝑐 is always greater than 𝑢_𝜋, we can see that when the characteristic velocity 𝑢_s is less than both 𝑢_𝑐 and 𝑢_𝜋, the slower mode is the unique amplified mode; in contrast, when 𝑢_s is greater than both 𝑢_𝑐 and 𝑢_𝜋, the faster mode is the unique amplified mode.

(a)

(b)

(c)

Figure 2 

Setup of TWFETs for shortening traveling pulses. (a) A representation of a TWFET, (b) the signal application to a TWFET and (c) the equivalent current-voltage relationship of an FET for a pulse traveling in the drain line.

When the TWFET succeeds in amplifying the unique mode, we can assume the simultaneous propagation of the leading edges of the gate and drain pulses. At this point, every FET operates as an electronic switch that is open for 𝑉_din>𝑉_𝑏, and closed for 𝑉_din<𝑉_p as shown in Figure 2(c). As a result, the pulse is influenced by finite shunt conductance for voltages less than 𝑉_p and is otherwise loss-free. Owing to this nonlinearity, a short-wavelength sinusoidal wave supported by an exponential edge develops [4]. Figure 3 schematically explains the mechanism of pulse-shortening phenomena. When a pulse of width 𝑙_init is input to the drain line ((1) of Figure 3), the above-mentioned short-wavelength sinusoidal wave is shown in (2). Because the drain line attenuates voltage waves only below 𝑉_p, the small-amplitude parts of the wave disappear with the shorter propagation than the large-amplitude ones ((3) in Figure 3). Finally, a short pulse is obtained at the output ((4) in Figure 3).

Figure 3 

Operation principle of pulse shortening in TWFETs.

5. Demonstration of Pulse Shortening in TWFETs

Three-dimensional FDTD calculations were carried out for demonstrating nonlinear pulse propagation along a TWFET. The total number of cells was 400×150×100. The spatial increments in the 𝑥, 𝑦, and 𝑧 orientations were set to 10, 2, and 10 μm, respectively. The calculation setup is illustrated in Figure 4(a). The gate and drain lines were aligned in the 𝑥 direction. At one of the ends of the lines, the inputs were applied with the hyperbolic secant pulses with the opposite parity. To maximize the coupling between the gate and drain lines, the spacing between two lines was set small and no ground plane was placed except the source. The dielectric constant of the substrate was set to 13.6. Moreover, a Mur’s 2nd-order absorbing boundary condition (ABC) was employed. FETs are placed every 30 μm along the electrode lines, whose widths were all set to 10 μm. Each FET was modeled as the drain-source current 𝐼_DS:𝐼_DS𝑉_GS,𝑉_DS=𝛽𝑉_GS−𝑉_TO²tanh𝛼𝑉_DS,𝑉_GS>𝑉_TO,0,𝑉_GS<𝑉_TO, (24)where we set 𝛽, 𝑉_TO, and 𝛼 to 20.0 mA/V², −1.0 V, and 2.0 V⁻¹, respectively. We ignore the influences caused by the gate-source current with the parasitic capacitors and resistors for clear observations of the nonlinear properties of a TWFET. We modeled 𝐼_DS as a piecewise-linear function with respect to 𝑉_DS with 2000 segments. The cross-section of electrodes is shown in Figure 4(b). For 𝑉_GS, we summed up the 𝑦 components of the electrical fields of the nine subsequent cells connecting the gate line and the source (the cells labeled by “G” in Figure 4(b)). Similarly, neighboring fifteen cells were used for evaluating 𝑉_DS (the cells labeled by “D” in Figure 4(b)).

(a)

(b)

Figure 4 

Setup of FDTD calculations. (a) The longitudinal and (b) the transverse structure of the calculated TWFET.

To obtain a rough estimation of the model TWFET, we carried out the quasi-TEM analysis [11]. The 2×2 capacitance matrix 𝐂 and inductance matrix 𝐋 are obtained by the numerical estimation of electrical charges stored in the electrode lines. By solving the Poisson equation for the case where 𝑉_GS and 𝑉_DS are set to 1.0 and 0.0 V, respectively, we can obtain the electrical charges stored in the gate and drain lines: 𝑄₁₁ and 𝑄₂₁. Those for the case where 𝑉_GS and 𝑉_DS are, respectively, set to 0.0 and 1.0 V, called 𝑄₁₂ and 𝑄₂₂ are similarly obtained. Then, the 2×2 matrix 𝐐, whose components are given by 𝑄_𝑖𝑗 (𝑖,𝑗=1,2), gives 𝐂. On the other hand, we consider the case where the electrodes are in vacuum; that is, the dielectric constant of each cell is set to unity for 𝐋. To obtain 𝐋, it is required to evaluate the capacitance matrix 𝐂₀ in vacuum by the same procedure as obtained 𝐂, because 𝐋 has to be equal to 𝑐⁻²𝐂₀⁻¹ (𝑐: the light velocity). As a result, we obtain the line parameters as listed in Table 1. Using them, 𝑢_𝜋 and 𝑢_𝑐 are calculated to be 0.29 𝑐 and 0.32 𝑐, respectively. Moreover, 𝑢_s satisfies the condition, 𝑢_s<𝑢_𝜋, so that the 𝜋-mode pulse is expected to be uniquely amplified; therefore, the pulse shortening can be observed in the one carried by the slower 𝜋 mode. The black curves in Figure 5 show the results from numerical integration of the transmission equations of a TWFET using the parameters listed in Table 1. Hyperbolic secant waveforms shown in Figure 5(a) are applied. The temporal waveforms monitored at five different FET cells, each separated by twelve FET cells, are shown. The thin and thick waveforms represent the pulse on the gate and drain lines, respectively. Because the discrepancy between the 𝑐- and 𝜋-mode velocities is small, the pulse carried by the 𝜋 mode is still overlapped with that carried by the 𝑐 mode even in Figure 5(f). However, it is observed that the pulse carried by the slower mode experiences shortening. On the other hand, the results from FDTD calculations are shown by the red curves in Figure 5. Five temporal waveforms are plotted and recorded at 480 μm intervals along the line in Figures 5(b)–5(f). Qualitatively, the waveform transients have good resemblance with those obtained by quasi-TEM calculations. The steep exponential edge is developed and the pulse starts to exhibit an oscillatory behavior and then is shortened. We have found that even a TWFET with practical FET properties succeeds in pulse shortening in the framework of the transmission line theory. Moreover, we experimentally confirmed the pulse shortening using actual FETs at low frequencies [12]. We believe that the FDTD calculations may contribute to the design of the monolithically integrated TWFETs as pulse compressor, when they are solved with a practical FET model.

Table 1 

Line parameters of test TWFET.

(a)

(b)

(c)

(d)

(e)

(f)

Figure 5 

Wave propagation on test TWFET. The waveforms on the gate and drain lines are shown by the thin and thick curves, respectively. The black and red curves correspond to the quasi-TEM and FDTD calculations, respectively. (a) shows the input waveforms. Waveforms recorded at the 𝑛th FET cell are shown. (b), (c), (d), (e), and (f) represent the waveforms at 𝑛=36, 48, 60, 72, and 84, respectively.

6. Conclusions

We demonstrated full-wave calculations that illustrate the pulse propagation characteristics of a TWFET. The pulse shortening in a TWFET was properly observed in the full-wave calculations. By using piecewise-linear modeling, FETs were characterized in FDTD without significant computational costs.