- About this Journal ·
- Abstracting and Indexing ·
- Advance Access ·
- Aims and Scope ·
- Annual Issues ·
- Article Processing Charges ·
- Articles in Press ·
- Author Guidelines ·
- Bibliographic Information ·
- Citations to this Journal ·
- Contact Information ·
- Editorial Board ·
- Editorial Workflow ·
- Free eTOC Alerts ·
- Publication Ethics ·
- Reviewers Acknowledgment ·
- Submit a Manuscript ·
- Subscription Information ·
- Table of Contents

International Journal of Antennas and Propagation

Volume 2012 (2012), Article ID 948972, 9 pages

http://dx.doi.org/10.1155/2012/948972

## Full-Wave Analysis of Traveling-Wave Field-Effect Transistors Using Finite-Difference Time-Domain Method

Graduate School of Science and Engineering, Yamagata University, 4-3-16 Jonan, Yonezawa, Yamagata 992-8510, Japan

Received 27 June 2011; Accepted 24 September 2011

Academic Editor: Ning Yuan

Copyright © 2012 Koichi Narahara. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

Nonlinear transmission lines, which define transmission lines periodically loaded with nonlinear devices such as varactors, diodes, and transistors, are modeled in the framework of finite-difference time-domain (FDTD) method. Originally, some root-finding routine is needed to evaluate the contributions of nonlinear device currents appropriately to the temporally advanced electrical fields. Arbitrary nonlinear transmission lines contain large amount of nonlinear devices; therefore, it costs too much time to complete calculations. To reduce the calculation time, we recently developed a simple model of diodes to eliminate root-finding routines in an FDTD solver. Approximating the diode current-voltage relation by a piecewise-linear function, an extended Ampere's law is solved in a closed form for the time-advanced electrical fields. In this paper, we newly develop an FDTD model of field-effect transistors (FETs), together with several numerical examples that demonstrate pulse-shortening phenomena in a traveling-wave FET.

#### 1. Introduction

The generation of a short electrical pulse with picosecond duration is one of the keys to producing a breakthrough in high-speed electronics. The applications of short pulses include measurement systems with picosecond temporal resolution, over-100-Gbit/s communication systems, and submillimeter-to-teraherz imaging systems [1]. We recently found that a transmission line periodically loaded with resonant tunneling diodes (RTDs) greatly compresses the temporal width of the pulse input to it [2]. Once the input pulse crosses the peak voltage of the loaded RTDs, the exponential wave is developed at voltages smaller than the peak voltage, and the sinusoidal wave is coupled to it at larger voltages, whose wave number becomes much larger than that of the input; therefore, the input pulse experiences significant shortening. The similar pulse shortening can be realized in traveling-wave field-effect transistors (TWFETs). A TWFET is a special type of FET whose electrodes are employed not only as electrical contacts but also as transmission lines [3]. We consider the case where a decreasing voltage pulse is applied to the gate line and an increasing one is simultaneously applied to the drain line. By properly designing the top and bottom levels of the applied pulses, every FET simulates an electronic switch (the switch is open for voltages greater than some fixed threshold, and closed otherwise). This arrangement guarantees the pulse shortening owing to the development of the exponential-sinusoidal waves as observed in an RTD line [4].

In order to evaluate the above-mentioned results in monolithically integrated devices, we have to develop the models of nonlinear devices such as RTDs and FETs for use in a finite-difference time-domain (FDTD) electromagnetic solver [5]. In FDTD-based solvers of Maxwell’s equations, a circuit element such as a capacitor, an inductor, or a nonlinear device, is usually implemented in an extended Ampere’s law as a field-dependent conductance/capacitance in a single Yee cell [6]. Unfortunately, it requires some root-finding routine such as the Newton-Raphson method to solve it to obtain the temporal advanced electrical fields for numerical stability [7]. The situation becomes more cumbersome, when the physical extent of devices cannot be ignored. Because we have to evaluate several adjacent cells for the terminal voltages that determine the device operation, a root-finder for multiple-variable functions is needed, which is very time-consuming. Moreover, we consider nonlinear transmission lines, which generally include numerous nonlinear devices.

Recently, we developed a concise model of nonlinear devices that contributes to eliminating the time-consuming root-finding procedures mentioned above. It approximates the voltage dependence of the device current by a piecewise-linear function and solves an extended Ampere’s law in a closed form. Actually, we successfully demonstrated an FDTD calculation of the pulse shortening in an RTD line [8]. The similar modeling can be applied not only for diodes but also for three-terminal devices such as FETs. Based on our strategy, we first discuss an FDTD model of FETs after giving brief reviews and then show the results of full-wave calculations that demonstrate the pulse compression in a TWFET.

#### 2. Diode Model in FDTD

When the conduction current density flowing in the device is denoted by , the temporal evolution of the electromagnetic fields is calculated on the basis of an extended Ampere’s law as where , , and are the electric field, magnetic field, and dielectric constant, respectively. By the single-cell implementation of the lumped device, (1) is converted as follows: where , , and show the cell size in , , and directions, respectively. The superscripts show the temporal positions, by which we represent the alternative evaluations of electrical and magnetic fields in FDTD. Moreover, and show the device current and terminal voltage, respectively. The current is assumed to flow in the direction and is equal to . Moreover, is given by at the cell corresponding to the device. Thus, (2) becomes As mentioned above, the argument of is evaluated at time for numerical stability. When a device occupies adjacent cells, the difference equations to be solved become where represents the field at the th cell occupied by the device.

To solve (4) explicitly, we approximate the voltage dependence of the device current by a piecewise-linear function. The key is the fact that is solved by hand in (4), when is a linear function of the arguments. Setting for different voltages , , is approximated by the following piecewise-linear function: where for . Substituting (5) into in (4) and setting , we obtain where

By straightforward calculations, (6) is solved with respect to to give where shows the column vector . Moreover, , and show the ()th entry of and the th component of , respectively. Note that is obtained in a closed form as After obtaining using (8), we have to check if the terminal voltage is really in the range with . If not, the procedure is repeated with other values, until . The presented diode model successfully demonstrated the wave properties traveling in an RTD transmission line [8, 9].

#### 3. FET Model in FDTD

There are many different equivalent circuits of an FET, depending on the accuracy and the application to use. For clarity, we first consider the simplest representation: an FET is represented only by the drain-source current as a function of both the gate-source and drain-source voltages. Then, an extended Ampere’s law is given by where and represent the gate-source and drain-source voltages, respectively. Again, the current is assumed to flow in the direction. The adjacent cells are used for calculating . Moreover, the electrical field components used for are denoted by . The difference equations to be solved become

At this point, we approximate the voltage dependence of by a piecewise-linear function and solve algebraically (13) with respect to (). The procedure is similar to the above-mentioned diode case, except that must be upgraded by corresponding electrical field components at time .

Next, we consider more practical FET models shown in Figure 1(a), called the Statz model [10]. The model takes the gate-source, gate-drain currents together with the drain-source current into consideration. Moreover, the parasitic resistances and capacitances are also modeled. The device current-voltage relationships are given by where , , and represent the gate, drain, and source currents, respectively. The auxiliary voltage variables and are solved with respect to and by the following expressions resulting from Kirchhoff’s law: For definiteness, we assume that the adjacent cells are used to evaluate and adjacent cells are for . Moreover, the gate and drain currents are assumed to flow the former and the latter cells, respectively. Then, we denote the electrical field components used for as , and the symbols are reserved for those representing . The difference equations to be solved become where represents for .

To obtain a piecewise-linear function that approximates the device currents, we triangulate the plane. For the present device currents, a simple triangulation shown in Figure 1(b) suffices. Setting for different voltages , is approximated by the following piecewise-linear function for in Figure 1(b): On the other hand, for in Figure 1(b), it is Hereafter, we denote the piecewise-linear counterparts of as for convenience. Substituting them into in (16), we obtain where has to set to and for and , respectively.

We again obtain the column vector in the form of . The th component of is given by where represents for , and for . Moreover, the matrix is given by where and . For the present case, is explicitly given aswhere . After obtaining , we have to check if the terminal voltages and are really in the range we presume. Otherwise, the procedure is repeated with coefficients corresponding to another triangularized regions in plane. Moreover, when the device model includes capacitors such as and , these terminal voltages must be recorded, which are required for evaluating and in (15).

In the following, we demonstrate the pulse shortening in TWFETs by FDTD calculations. Although the line structure we set up is rather impractical, we successfully observed the shortening of the pulse traveling along a TWFET. It is observed, only when the nonlinear operations of a large amount of FETs are properly simulated. We thus believe that this example calculation clarifies the validity of our models. Before showing calculation results, we briefly review the mechanism of the pulse shortening in TWFETs.

#### 4. Pulse Shortening in TWFETs

Figure 2(a) shows the equivalent representation of a TWFET. One end of each electrode line labeled as is for signal applications. Figure 2(b) shows the required pulse shapes applied at . The voltages biasing the gate and drain lines are denoted by and , respectively. The drain pulse has the opposite parity to the gate pulse. Moreover, the top and bottom voltage levels of the drain (gate) pulse are set to () and (), respectively. At this point, is set below the FET threshold voltage , and both of and are set to approximately 0 V. The thin curves in Figure 2(c) show the drain current-voltage relationships for several different gate bias voltages. The uppermost and lowermost curves correspond to the relationships for and , respectively. Because of the presence of electromagnetic couplings between the gate and drain lines, two different propagation modes, called the mode and the mode [11], are developed on a TWFET. We can design a TWFET to amplify only the pulses carried by one of the two modes and attenuate the pulses carried by the other mode [4]. The conditions are given by simple inequalities using three variables , , and defined as where the upper (lower) signs are for () mode. Moreover, we used two variables for brevity: and . It is then found that the -mode pulse is generically amplified when , while the -mode pulse is amplified when . Because is always greater than , we can see that when the characteristic velocity is less than both and , the slower mode is the unique amplified mode; in contrast, when is greater than both and , the faster mode is the unique amplified mode.

When the TWFET succeeds in amplifying the unique mode, we can assume the simultaneous propagation of the leading edges of the gate and drain pulses. At this point, every FET operates as an electronic switch that is open for , and closed for as shown in Figure 2(c). As a result, the pulse is influenced by finite shunt conductance for voltages less than and is otherwise loss-free. Owing to this nonlinearity, a short-wavelength sinusoidal wave supported by an exponential edge develops [4]. Figure 3 schematically explains the mechanism of pulse-shortening phenomena. When a pulse of width is input to the drain line ((1) of Figure 3), the above-mentioned short-wavelength sinusoidal wave is shown in (2). Because the drain line attenuates voltage waves only below , the small-amplitude parts of the wave disappear with the shorter propagation than the large-amplitude ones ((3) in Figure 3). Finally, a short pulse is obtained at the output ((4) in Figure 3).

#### 5. Demonstration of Pulse Shortening in TWFETs

Three-dimensional FDTD calculations were carried out for demonstrating nonlinear pulse propagation along a TWFET. The total number of cells was . The spatial increments in the , , and orientations were set to 10, 2, and 10 *μ*m, respectively. The calculation setup is illustrated in Figure 4(a). The gate and drain lines were aligned in the direction. At one of the ends of the lines, the inputs were applied with the hyperbolic secant pulses with the opposite parity. To maximize the coupling between the gate and drain lines, the spacing between two lines was set small and no ground plane was placed except the source. The dielectric constant of the substrate was set to 13.6. Moreover, a Mur’s 2nd-order absorbing boundary condition (ABC) was employed. FETs are placed every 30 *μ*m along the electrode lines, whose widths were all set to 10 *μ*m. Each FET was modeled as the drain-source current :where we set , , and to 20.0 mA/V^{2}, −1.0 V, and 2.0 V^{−1}, respectively. We ignore the influences caused by the gate-source current with the parasitic capacitors and resistors for clear observations of the nonlinear properties of a TWFET. We modeled as a piecewise-linear function with respect to with 2000 segments. The cross-section of electrodes is shown in Figure 4(b). For , we summed up the components of the electrical fields of the nine subsequent cells connecting the gate line and the source (the cells labeled by “G” in Figure 4(b)). Similarly, neighboring fifteen cells were used for evaluating (the cells labeled by “D” in Figure 4(b)).

To obtain a rough estimation of the model TWFET, we carried out the quasi-TEM analysis [11]. The capacitance matrix and inductance matrix are obtained by the numerical estimation of electrical charges stored in the electrode lines. By solving the Poisson equation for the case where and are set to 1.0 and 0.0 V, respectively, we can obtain the electrical charges stored in the gate and drain lines: and . Those for the case where and are, respectively, set to 0.0 and 1.0 V, called and are similarly obtained. Then, the matrix , whose components are given by (,2), gives . On the other hand, we consider the case where the electrodes are in vacuum; that is, the dielectric constant of each cell is set to unity for . To obtain , it is required to evaluate the capacitance matrix in vacuum by the same procedure as obtained , because has to be equal to (: the light velocity). As a result, we obtain the line parameters as listed in Table 1. Using them, and are calculated to be 0.29 and 0.32 , respectively. Moreover, satisfies the condition, , so that the -mode pulse is expected to be uniquely amplified; therefore, the pulse shortening can be observed in the one carried by the slower mode. The black curves in Figure 5 show the results from numerical integration of the transmission equations of a TWFET using the parameters listed in Table 1. Hyperbolic secant waveforms shown in Figure 5(a) are applied. The temporal waveforms monitored at five different FET cells, each separated by twelve FET cells, are shown. The thin and thick waveforms represent the pulse on the gate and drain lines, respectively. Because the discrepancy between the - and -mode velocities is small, the pulse carried by the mode is still overlapped with that carried by the mode even in Figure 5(f). However, it is observed that the pulse carried by the slower mode experiences shortening. On the other hand, the results from FDTD calculations are shown by the red curves in Figure 5. Five temporal waveforms are plotted and recorded at 480 *μ*m intervals along the line in Figures 5(b)–5(f). Qualitatively, the waveform transients have good resemblance with those obtained by quasi-TEM calculations. The steep exponential edge is developed and the pulse starts to exhibit an oscillatory behavior and then is shortened. We have found that even a TWFET with practical FET properties succeeds in pulse shortening in the framework of the transmission line theory. Moreover, we experimentally confirmed the pulse shortening using actual FETs at low frequencies [12]. We believe that the FDTD calculations may contribute to the design of the monolithically integrated TWFETs as pulse compressor, when they are solved with a practical FET model.

#### 6. Conclusions

We demonstrated full-wave calculations that illustrate the pulse propagation characteristics of a TWFET. The pulse shortening in a TWFET was properly observed in the full-wave calculations. By using piecewise-linear modeling, FETs were characterized in FDTD without significant computational costs.

#### References

- M. J. W. Rodwell, S. T. Allen, R. Y. Yu et al., “Active and nonlinear wave propagation devices in ultrafast electronics and optoelectronics,”
*Proceedings of the IEEE*, vol. 82, no. 7, pp. 1037–1059, 1994. View at Publisher · View at Google Scholar · View at Scopus - K. Narahara and A. Yokota, “Experimental characterization of short-pulse generation using switch lines,”
*IEICE Electronics Express*, vol. 5, no. 22, pp. 973–977, 2008. View at Publisher · View at Google Scholar · View at Scopus - G. W. McIver, “A traveling-wave transistor,”
*Proceedings of the IEEE*, vol. 53, no. 11, pp. 1747–1748, 1965. View at Google Scholar - K. Narahara, “Characterization of short-pulse generation using traveling-wave field-effect transistors,”
*Japanese Journal of Applied Physics*, vol. 50, pp. 014104–014109, 2011. View at Publisher · View at Google Scholar - A. Taflove,
*Computational Electrodynamics the Finite-Difference Time-Domain Method*, Artech House, London, UK, 1995. - K. S. Yee, “Numerical solution of initial boundary value problems involving Maxwell's equations in isotropic media,”
*IEEE Transactions on Antennas and Propagation*, vol. 14, pp. 302–307, 1966. View at Google Scholar - R. Luebbers, J. Beggs, and K. Chamberlin, “Finite difference time-domain calculation of transients in antennas with nonlinear loads,”
*IEEE Transactions on Antennas and Propagation*, vol. 41, no. 5, pp. 566–573, 1993. View at Publisher · View at Google Scholar · View at Scopus - K. Narahara and A. Yokota, “Full-wave analysis of quasi-steady propagation along transmission lines periodically loaded with resonant tunneling diodes,”
*Japanese Journal of Applied Physics*, vol. 47, no. 2, pp. 1126–1129, 2008. View at Publisher · View at Google Scholar · View at Scopus - K. Narahara, “Nonlinear waves in transmission lines periodically loaded with tunneling diodes,” in
*Wave Propagation in Materials for Modern Applications*, pp. 437–454, InTech, Olajnica, Poland, 2010. View at Google Scholar - H. Statz, P. Newman, I. W. Smith, R. A. Pucel, and H. A. Haus, “GaAs FET device and circuit simulation in SPICE,”
*IEEE Transactions on Electron Devices*, vol. 34, no. 2, pp. 160–169, 1987. View at Google Scholar · View at Scopus - K. C. Gupta, R. Garg, and I. J. Bahl,
*Microstrip Lines and Slotlines*, Artech House, Norwood, Mass, USA, 1979. - K. Narahara, “Experimental observation of pulse-shortening phenomena in traveling-wave field effect transistors,”
*Progress In Electromagnetics Research Letters*, vol. 21, pp. 79–88, 2011. View at Google Scholar