498176.fig.008a
(a)
498176.fig.008b
(b)
498176.fig.008c
(c)
498176.fig.008d
(d)
498176.fig.008e
(e)
498176.fig.008f
(f)
498176.fig.008g
(g)
498176.fig.008h
(h)
498176.fig.008i
(i)
Figure 8: Fabrication process. (a) Standard wafer cleaning followed by the thermal growth of SiO2, (b) 0.5 μm-thick titanium deposited by sputtering, (c) 1.5 μm-thick aluminum deposited by sputtering, (d) ground plane patterned with Ti and Al by lithography, (e) dimples formed by SU8-2002 pattering, (f) AZ-4260 sacrificial layer forming, (g) definition of anchor by pattering, (h) Ti-Al deposited by sputtering and (i) MEMS release process.