Application Article
Implementation of a Zero-Forcing Precoding Algorithm Combined with Adaptive Beamforming Based on WiMAX System
Table 2
Complexity of signal processing unit (all the digital signal processing is performed with 12 bits).
| | | Device | Functions | Complexity (K gates) |
| | Uplink |
FPGA | Ranging code Correlator | 21.9 | | FFT | 338.2 | | CP removal | 8.3 | | Timing synchronization | 597.9 | | Frequency synchronization | 614.3 | | DSP-1 | Delay estimation | — | | Ranging code detection | — | | Weight calculation | — | |
DSP-2 | Channel estimation | — | | MIMO detection | — | | DSP-3 | Demodulation | — | | FEC decoding | — | | Deinterleaving | |
| | Total logic gates | 1580.6 |
| | Downlink | FPGA | Weight multiplication | 376.8 | | IFFT | 638.2 | | Permutation | 58.9 | | CP addition | 11.4 | | Preamble | 14.2 | | DSP-1 | Calibration | — | | DSP-2 | MIMO encoding | — | | DSP-3 | Modulation | — | | Concatenation | — | | DSP-4 | Randomization | — | | DSP-5 | FEC | — | | Interleaving | — |
| | Total logic gates | 1099.5 |
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