Abstract
The starting point of this work is the development of a new class of partially structured LDPC
codes, very well suited for hardware implementation. Specifically these codes are built so that the edges
of their parity matrix can be partitioned into two disjoint sets, namely, the structured and the random
ones. For the proposed class of codes a constructive design method is provided. To assess the value
of this method the constructed codes performance are presented. From these results, a novel decoding
method called split decoding is introduced. Finally, to prove the effectiveness of the proposed approach
a whole VLSI decoder is designed and characterized.