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International Journal of Photoenergy
Volume 2012 (2012), Article ID 921908, 6 pages
Effect of High-Temperature Annealing on Ion-Implanted Silicon Solar Cells
1Department of Materials Science and Engineering, Korea University, Seoul 136-713, Republic of Korea
2Nano-Process and Tech & Biz Division, National Nanofab Center, Daejeon 305-806, Republic of Korea
Received 8 November 2011; Revised 30 December 2011; Accepted 30 December 2011
Academic Editor: Junsin Yi
Copyright © 2012 Hyunpil Boo et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
P-type and n-type wafers were implanted with phosphorus and boron, respectively, for emitter formation and were annealed subsequently at 950~1050 for 30~90 min for activation. Boron emitters were activated at or higher, while phosphorus emitters were activated at . QSSPC measurements show that the implied of boron emitters increases about 15 mV and the decreases by deep junction annealing even after the activation due to the reduced recombination in the emitter. However, for phosphorus emitters the implied decreases from 622 mV to 560 mV and the increases with deep junction annealing. This is due to the abrupt decrease in the bulk lifetime of the p-type wafer itself from 178 μs to 14 μs. PC1D simulation based on these results shows that, for p-type implanted solar cells, increasing the annealing temperature and time abruptly decreases the efficiency (%), while, for n-type implanted solar cells, deep junction annealing increases the efficiency and , especially (%) for backside emitter solar cells.
The formation of the emitter in fabricating solar cells is one of the critical processes in the solar cell fabrication process. The emitter is usually formed by diffusing the dopant atom into a silicon wafer surface. There are many ways in creating the emitter, including the standard diffusion process, ion implantation, and epitaxial growth. Of these methods, ion implantation, when applied to the solar cell fabrication, has many advantages compared to the conventional thermal diffusion method . It does not require the etching of the phosphosilicate glass formed during the diffusion process or the additional edge isolation step. Compared to the thermal diffusion method, ion implantation also allows an excellent control over the doping profile. The doping profile can be controlled by modifying the dose or the acceleration during the implantation or by modifying the annealing step, which also acts as a drive-in step .
During implantation the implanted dopants are bombarded into the silicon, and this process produces point defects within the lattice. These defects are in the form of Si self-interstitials, created when the ions collide with the Si atoms which then are displaced from their equilibrium positions [2–8].
This damage requires repairing, which is done by performing a postimplant thermal process. This thermal process also activates the dopant ions by establishing them on substitutional sites where they are able to contribute holes (electrons) to the valence (conduction) band [2, 3].
The annealing condition has a major effect on ion-implanted solar cells because they control the activation and the diffusion profile of the ion-implanted dopants. The activation part of the annealing is more critical since the in-activated dopants act as recombination sites, reducing the minority carrier lifetime and decreasing the of solar cells. The previous studies have created solar cells with minimum annealing. The annealing was done at the least after the ions were activated in other studies to form a shallow emitter, which is thought to increase the due to their higher quantum efficiency at short wavelengths.
In this study, however, the ion-implanted emitters were annealed even after they were activated to create deep junctions. Since the total concentration of the dopants is fixed for implanted emitters, high-temperature or long-time annealing lowers the peak concentration at the surface as well as increasing the deep junctions. Lowering of the peak concentration should decrease the surface recombination, increasing the as well as the quantum efficiency at short wavelengths. P-type and n-type wafers were implanted with phosphorus and boron, respectively, for emitter formation and were annealed subsequently to see the effect of the deep junction annealing.
Phosphorus ions were implanted with an acceleration voltage of 30 keV and a dose of 1e15 cm−2 on p-type c-Si wafers 675 μm thick and a resistivity of 8~12 Ω·cm. Boron ions were implanted with an acceleration voltage of 40 keV and a dose of 5e15 cm−2 on n-type c-Si wafers 675 μm thick and a resistivity of 4~7 Ω·cm. The samples were annealed at 950°C, 1000°C, and 1050°C with varying time with 30, 60, and 90 min. The sheet resistances of the samples were measured using a 4-point probe, the doping concentration profile was measured using secondary ion mass spectrometry (SIMS), and the implied at 1-sun (using the minority carrier lifetime) was measured using quasi-steady-state photoconductance (QSSPC). Dark current-voltage (Dark IV) measurement was done on diode samples with metal contacts that were evaporated on both sides of the wafer. For the p-type wafers, 20 nm of Ni and 200 nm of Ag were evaporated on phosphorus emitters and 20 nm of Ti and 200 nm of Al on the bulk side. For the n-type wafers, 200 nm of Ag was evaporated on boron emitters and 20 nm of Ti 200 nm of Al was on the bulk side. While the samples for measuring the sheet resistance, SIMS, and Dark IV were implanted on only one side, the samples for measuring QSSPC were implanted on both sides and was deposited on each side using plasma-enhanced chemical vapor deposition (PECVD). Bare p-type and n-type wafers were also heated with the same annealing conditions to measure the change in their bulk lifetimes.
Using the measured data from the experiments above, PC1D was used to simulate their effect on solar cells. Three types of simulations were done. First, p-type wafers were simulated with phosphorus emitters in the front side of the wafer and boron back surface fields (BSF) in the back. Secondly n-type wafers were simulated with boron emitters in the front and phosphorus BSF in the back. Lastly, n-type wafers were simulated with phosphorus front surface fields (FSF) in the front and boron emitters in the back.
3. Results and Discussion
A SIMS profile of the boron-implanted emitters was taken (shown in Figure 1) and shows that when the annealing is done at 950°C for 30 min, there is a spike in the doping profile, which decreases but remains slightly when annealing is carried on for 90 min, but remains slightly. Because the position of the spike corresponds to the peak of the as-implanted doping profile, the spike can be assumed to be boron clustered formed during the initial stage of the annealing. These clusters are known to be immobile and electrically inactive . The spike disappears when the temperature is increased to 1000°C in this study. This disappearance follows the literature that, while boron clusters start to dissolve at 800°C, the more stable ones require long-time or high-temperature anneals . This implies that the deep junction annealing for the boron-implanted emitter starts at 1000°C. The same result can be seen by comparing the measured and the calculated (sheet resistance) of the boron emitter (in Figure 2). The horizontal axis is aligned in the order of the total heat during the annealing. The measured was obtained using a 4-point probe and represents only the activated boron ions, because only the activated ions contribute to the amount of the majority carriers. The calculated was calculated by using SIMS profiles and the Irvin curve . The mobility of the electrons and holes at each depth was calculated according to the doping profile . Since the calculated is based on all the implanted boron ions in the SIMS profile it represents the sheet resistance when the activation is complete. The measured starts with 47.2 Ω/□ when the annealing condition is 950°C at 30 min, 12.1 Ω/□ larger than the measured . The measured becomes lower than the calculated when the annealing condition is increased to 1000°C, when the measured decreases abruptly from 47.2 Ω/□ to 38 Ω/□ and then saturates. This complies with the dissolving boron clusters shown in the SIMS profile. When the boron clusters are not activated, there are insufficient mobile carriers and the measured is larger than the calculated .
The case of the phosphorus-implanted emitters shows a different trend from the boron emitters. The SIMS profile (Figure 3) of the phosphorus emitters has no spike in any of the profiles. The measured and the calculated also follow the same trend in Figure 4. This indicates that the phosphorus-implanted emitter can be assumed to be activated at 950°C. The steady decrease of both the measured and calculated is due to the increase in the electron mobility as the doping concentration changes with annealing conditions. The implanted phosphorus dopants act as scattering points for the electrons, lowering their mobility when the dopant concentration is high. The mobility of the electrons increases because the average dopant concentration falls as the annealing condition becomes higher or longer. This is why the of the phosphorus-implanted emitter decreases although the total amount of the phosphorus concentration does not change. The of the boron emitter does not show this trend because holes, the majority carriers in boron emitters, are not affected by the boron concentration as strongly as the electrons in the phosphorus emitters [5, 6].
Figure 5 shows the implied of the ion-implanted samples from QSSPC. The implied of the boron emitters increases about 30 mV at 950°C when the damage from the implantation is being annealed and about 15 mV more during the deep junction annealing at 1000°C and 1050°C. The increase of the implied at the high temperatures shows that the deep junction annealing after the activation reduces the recombination as the doping concentration becomes lower as the annealing proceeds . However, the implied of the phosphorus emitters continuously decreases about 60 mV even though the implanted phosphorus ions are already activated.
The of the boron and phosphorus emitters (in Figure 6) with different annealing conditions, measured using Dark IV, supports the implied results. As the graph shows, of phosphorus emitters increases when it is deep junction annealed after the activation. The of boron emitters shows an opposite result, decreasing abruptly during the activation at 950°C and moderately during the deep junction annealing at higher temperatures. As written above, the decrease of the during the deep junction annealing is linked to the decrease of the concentration of boron. Higher annealing temperatures and longer times will diffuse the boron more deeply into the wafer as shown in the SIMS profile (in Figure 1). The concentration of boron near the front surface decreases, which leads to a lower front surface recombination velocity (FSRV), which in turn reduces the . The increase of the for the phosphorus emitters is not due to the recombination in the emitter but the effect of the bulk lifetime.
Figure 7 shows the result of heating bare p-type and n-type wafers with the same conditions as the postimplantation annealing, showing the change in the bulk lifetime according to the annealing conditions. As can be seen, the bulk lifetime of both types of wafers decreases when annealing is done for a long time. While the bulk lifetime of n-type wafers decreases about 40 μs during the annealing process, the bulk lifetime of the p-type wafers decreases over 150 μs. This abrupt decrease of bulk lifetime in p-type wafers is the cause of the drop of the implied in Figure 5. The implied decreases when the of the sample increases as shown by the formula below
The implied is affected by the diffusion length of the bulk, as well as recombination in the emitter. While the high temperature of long-time annealing of the samples makes the junctions deeper and decreases the doping concentration of the surface leading to less Auger recombination and larger hole diffusion length ( in the emitter for p-type wafers), the bulk lifetime decreases far abruptly and hence will be dominated by the electron diffusion length ( in the bulk) leading to the decrease of the implied as the annealing proceeds. For n-type wafers, however, the bulk lifetime decreases in a moderate way; this leads to an abrupt increase of implied at 950°C and a moderate increase at higher temperatures.
The dissimilarity in the bulk lifetime of the two wafer types comes from the capture cross-section difference in impurities . Impurities, especially metal impurities, produce deep levels in the band gap which act as recombination sites according to the Shockley-Read-Hall model. The impurities, when occurring at either interstitial or substitutional lattice sites, act as donor of acceptor models, respectively, and alternate between charge states and neutral states capturing electrons or holes in the process. The capture cross-section for either electrons or holes differs greatly according to the impurity. For donor impurities the capture cross-section for electrons is much greater than that for holes and for acceptor impurities vice versa. When cooling after a high-temperature process, while donor impurities form a moderate concentration of interstitial centers, acceptor impurities form precipitates and only a small concentration of the impurities forms substitutional centers [9, 10]. Since the donor impurities capture electrons an order faster than holes, the lifetime of electrons, the minority carrier of the p-type wafers, decrease abruptly when the wafer is heated and cooled. This is the reason for the abrupt decrease of the bulk lifetime in Figure 7.
Using the data obtained in this study, a simulation of different wafer types was done using PC1D. The data used based on this study were the SIMS profiles, bulk lifetimes, and the front and back surface recombination velocities (according to the peak concentrations) [11, 12]. The background doping was set to be 1e16 cm−3 for p-type wafers and 5e15 cm−3 for n-type wafers. The reflectance of the antireflection coating used in the simulation had a weighted reflectance of 15.7%. The annealing conditions used in the simulation were 1000°C for 60 min, 1000°C for 90 min, and 1050°C for 90 min. The 950°C annealing conditions were not used because as seen from the sheet resistance, boron is insufficiently annealed at this temperature. In the simulations, both sides of the wafers were assumed to be ion implanted for p-type wafers (P-emitter, B-BSF), n-type wafers (B-emitter, P-BSF), and n-type wafers with backside emitters (B-emitter, P-FSF), respectively. The n-type wafers with backside emitters were simulated to test the effect of deep junction annealing for solar cells with emitters in the back as in interdigitated back contact (IBC) solar cells. The result of the simulation is shown in Table 1. Decrease in the bulk lifetime has a dominating effect for p-type wafers, resulting in a decrease in the efficiency as the annealing proceeds . Although the deep annealing lowers the doping concentration and hence reduc the Auger recombination and the surface recombination, it also abruptly lowers the bulk lifetime as shown above. The low bulk recombination reduces the , which causes the quantum efficiency (QE) and the to deteriorate. This result shows that for the p-type implanted solar cells the annealing should be stopped when the activation is complete. For n-type solar cells, because the bulk lifetime only decreases slightly with the annealing, the deep junction annealing has a positive effect on the efficiency . The is increased, and the QE increases as well, leading to the increase of the . The deep junction annealing has the biggest effect in the third group, where the boron emitters are in the back of the n-type wafers . Since the emitters are in the back, recombination of the minority carriers needs to be reduced, which can be done by the deep junction annealing. These results show that deep junction annealing can be used to increase the efficiency of implanted n-type solar cells.
The effect of deep junction annealing after the activation was investigated for ion-implanted emitters. The SIMS profiles and the difference between the measured and the calculated indicate that the boron emitters are activated above 1000°C, while phosphorus emitters are already activated at 950°C. Above 1000°C, the implied of boron emitters rises with annealing time and temperature about 15 mV even after the activation. The also decreases, which indicates that the deep junction annealing decreases the recombination velocity by reducing the surface concentration. Deep junction annealing for the phosphorus emitters, however, decreases the implied and increases the with annealing time and temperature. This effect is due to the decrease of bulk lifetime during the annealing at high temperatures, especially for p-type wafers. The dominating decrease in the bulk lifetime for p-type wafers indicates that for annealing implanted solar cells at high temperatures, n-type wafers should be used. Simulations using PC1D conclude this effect showing that for p-type implanted solar cells increasing the annealing temperatures or time decreases the efficiency . For n-type implanted solar cells, however, deep junction annealing reduces the recombination in the solar cell creating an increase in the efficiency , especially for n-type solar cells with emitters in the backside of the wafer . In summary, while the least annealing is suitable for p-type implanted solar cells, for the n-type implanted solar cells deep junction annealing even after complete activation can increase the efficiency.
This work was supported by the New & Renewable Energy and Human Resources Development of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) grant funded by the Korea government Ministry of Knowledge Economy (no. 2009301001001B & 20104010100640).
- Y. Nishi and R. Doering, Handbook of Semiconductor Manufacturing Technology, Marcel Dekker, New York, NY, USA, 2000.
- J. F. Ziegler, Ed., Ion Implantation Science and Technology, Ion Implantation Technology, Edgewater, Md, USA, 2000.
- J. Narayan, O. W. Holland, R. E. Eby, J. J. Wortman, V. Ozguz, and G. A. Rozgonyi, “Rapid thermal annealing of arsenic and boron-implanted silicon,” Applied Physics Letters, vol. 43, no. 10, pp. 957–959, 1983.
- R. Angelucci, F. Cembali, P. Negrini, M. Servidori, and S. Solmi, “Temperature and time dependence of dopant enhanced diffusion in self-ion implanted silicon,” Journal of the Electrochemical Society, vol. 134, no. 12, pp. 3130–3134, 1987.
- T. E. Seidel and A. U. Mac Rae, “Isothermal annealing of boron implanted silicon,” Radiation Effects, vol. 7, no. 1-2, pp. 1–6, 1971.
- J. C. C. Tsai, “Shallow phosphorus diffusion profiles in silicon,” Proceedings of the IEEE, vol. 57, no. 9, pp. 1499–1506, 1969.
- G. Masetti, M. Severi, and S. Solmi, “Modeling of carrier mobility against carrier concentration in arsenic-doped, phosphorus-doped, and boron-doped silicon,” IEEE Transactions on Electron Devices, vol. 30, no. 7, pp. 764–769, 1983.
- R. A. Sinton and A. Cuevas, “Contactless determination of current-voltage characteristics and minority-carrier lifetimes in semiconductors from quasi-steady-state photoconductance data,” Applied Physics Letters, vol. 69, no. 17, pp. 2510–2512, 1996.
- M. J. Kerr and A. Cuevas, “General parameterization of Auger recombination in crystalline silicon,” Journal of Applied Physics, vol. 91, no. 3, pp. 2473–2480, 2002.
- D. Macdonald and L. J. Geerligs, “Recombination activity of interstitial iron and other transition metal point defects in p- and n-type crystalline silicon,” Applied Physics Letters, vol. 85, no. 18, pp. 4061–4063, 2004.
- K. Graff, Metal Impurities in Silicon Device Fabrication, Springer Series in Materials Science, Springer, Berlin, Germany, 2nd edition, 2000.
- H. Lemke, Semiconductor Silicon 1994, Electrochemical Society, Pennington, NJ, USA, 1994.