Traversal Caches: A Framework for FPGA Acceleration of Pointer Data Structures
Figure 6
(a) Speedups versus the original pointer-based software implementation obtained for: array-based software (array) and an accelerator using the traversal cache framework for invalidation rates ranging from 1 to 80 (IR1-80). The results show that for some algorithms even high invalidation rates can achieve large speedup. (b) The same comparisons against pointer-based software after recoding the traversal cache implementations to use arrays. A similar speedup for audio and graphics shows that traversal caches can sometimes nearly completely hide the overhead of pointer-based structures.
