Using Partial Reconfiguration and Message Passing to Enable FPGA-Based Generic Computing Platforms

Table 1

PR overhead at different PR event granularities.

Num of PR	PCIe		FSB
events	Exec. time (𝑠)	Times slower	Exec. Time (𝑠)	Times slower
100	18.695	425	6.466	308
10	1.912	43	0.666	32
1	0.231	5	0.085	4
no PR	0.044	—	0.021	—