A Protein Sequence Analysis Hardware Accelerator Based on Divergences

Table 8

Related work and comparison with our solution.

Reference	Number of PEs	Max. number of HMM nodes	Max. sequence size	Complete Plan7-Viterbi algorithm	Clock (MHz)	Performance (GCUPS)	Gain	FPGA
[3]	68	544	1024	N	180	10	190	Xilinx Virtex II 6000
[13]	90	1440	1024	N	100	9	247	Xilinx 2VP100
[11]	50	—	—	N	200	5 to 20	—	Not Synthesized
[14]	72	1440	8192	N	74	3.95	195	XC2V6000
[15]	10	256	—	Y	70	7	300	XC3S1500
[16]	50	—	—	N	66	1.3	50	Xilinx Spartan 3 4000
[20]	25	—	—	Y	130	3.2	56.8	Xilinx Virtex 5 110-T
Our work	85	2295	8192	N	67	5.8	254 (182 * )	Altera Stratix II EP2S180F1508C3

*Including significant sequences reprocessing times.