Research Article
Exploration of Uninitialized Configuration Memory Space for Intrinsic Identification of Xilinx Virtex-5 FPGA Devices
Table 1
Frame address register description (Xilinx Virtex-5).
| Address type | Bit index | description |
| Block type | [23:21] | Used in Virtex-5: 000 up to 011. | Top_B bit | 20 | Selects between top and bottom | Row address | [19:15] | Selects the current row | Column address | [14:7] | Selects a major column | Minor address | [6:0] | Selects a frame |
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