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International Journal of Reconfigurable Computing
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International Journal of Reconfigurable Computing
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2012
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Article
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Fig 12
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Research Article
Adaptive Multiclient Network-on-Chip Memory Core: Hardware Architecture, Software Abstraction Layer, and Application Exploration
Figure 12
Comparison of the achievable write throughput in MB/s at 125 Mhz: Star-Wheels NoC and adaptive memory core versus PLB and Xilinx MPMC controller, both with and without MPI layer.