Research Article
On the Feasibility and Limitations of Just-in-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors
Algorithm 1
Hardware estimation.
(1) | (2) for in do | (3) for nodes() do | (4) Latency() | (5) Pipeline() | (6) if Pipeline() 0 then | (7) and | (8) end if | (9) end for | (10) if Pipeline() then | (11) | (12) end if | (13) and | (14) and | (15) end for |
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