Research Article

On the Feasibility and Limitations of Just-in-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors

Table 5

Specialization process executed for whole applications when targeting the Woolcano architecture without capacity constraints. The performance of the custom instructions has been determined with the PivPav tool. ISE algorithms: MM: MaxMiso, SC: SingleCut, UN: Union. SC and UN search is constrained to 4 inputs and 1 input.

AppExecutionruntimesISE algorithm runtimeCandidates foundMax ASIP-SP Speedup
VM Nat Ratio MM SC UN MM SC UN MM SC UN
[s] [s] x [ms] [ms] [ms] # # # x x x

164.gzip 23.71 18.47 1.28 40.6 549.0 11170.0 1621 44177 43682 1.172 1.213 1.213
179.art 69.92 74.70 0.94 12.3 55.1 3350.0 371 3534 3513 1.526 21.414 21.414
183.equake 7.97 6.79 1.17 13.5 457.9 4351.0 672 9690 9690 2.147 25.972 25.972
188.ammp 23.18 17.24 1.34 145.7 15840 75471224413.44920.826
429.mcf 23.94 24.06 1.00 11.1 68.7 200.5 571 3571 3562 1.112 1.112 1.112
433.milc 20.95 16.43 1.28 78.1 5065 3573594501.30121.546
444.namd 39.94 34.31 1.16 227.5 3585411490 1259701.60924.846
458.sjeng 180.41 155.66 1.16 123.7 6244.1 235195.7 5540 83173 83035 1.118 1.137 1.137
470.lbm 5.68 5.36 1.06 8.6 2777.1 490182162.55444.622
473.astar 66.00 67.68 0.98 33.4 914.8 303796653 1408 37025 32368 1.159 1.19 1.19

AVG_S 46.17 42.07 1.14 69.45 6783 30405092 3328 50724 17585 1.71 16.39 5.20

adpcm 29.22 28.35 1.03 1.7 15.0 3869.4 83 819 819 1.243 1.309 1.293
fft 18.47 18.49 1.00 1.6 9.7 33.1 87 553 552 3.1 14.413 14.413
sor 15.83 15.85 1.00 0.7 4.3 14.6 35 384 375 14.418 14.422 14.418
whetstone 28.66 28.50 1.01 1.6 9.5 64.0 69 435 43518.012 18.01218.012

AVG_E 23.04 22.80 1.01 1.40 9.62 995.27 68.50 547.75 545.25 9.19 12.04 12.03

RATIO 2.00 1.85 1.13 49.61 705.05 30549.59 48.59 92.61 32.25 0.19 1.36 0.43