Exploring Many-Core Design Templates for FPGAs and ASICs

Algorithm 1

The reformulated order-graph sampler loop nest. {𝒮_𝑜, 𝒮_𝑔} and 𝒢 are the current {order, graph} scores and graph associated with an order. 𝑖𝑛𝑖𝑡𝑖𝑎𝑙𝑖𝑧𝑒() generates a random order, 𝑠𝑤𝑎𝑝() exchanges nodes in an order, and 𝑠𝑎𝑣𝑒() saves a result for the postprocessing step.

  for {𝑟,𝑐} in ℛ×𝒞    do

   𝑖𝑛𝑖𝑡𝑖𝑎𝑙𝑖𝑧𝑒(𝒪[𝑟][𝑐])

 end for

 for  𝑖 in ℐ  do

5: for   {𝑟,𝑐} in ℛ×𝒞   do

    𝒪_𝑝[𝑟][𝑐]←𝑠𝑤𝑎𝑝(𝒪[𝑟][𝑐])

    Variable initialization:

    𝒪_𝑝[𝑟][𝑐]⋅𝒮_𝑜,𝒪_𝑝[𝑟][𝑐]⋅𝒮_𝑔←0

    𝒪_𝑝[𝑟][𝑐]⋅𝒢←[]

10:  end for

  for 𝑛 in 𝒩  do

   for {𝑟,𝑐} in ℛ×𝒞   do

    (𝑠_𝑜,𝑠_𝑔,𝑔)=𝑠𝑐𝑜𝑟𝑒(𝒟[𝑛],𝒪_𝑝[𝑟][𝑐][𝑛])

    𝒪_𝑝[𝑟][𝑐]⋅𝒮_𝑜←𝒪_𝑝[𝑟][𝑐]⋅𝒮_𝑜+𝑠_𝑜

15:      𝒪_𝑝[𝑟][𝑐]⋅𝒮_𝑔←𝒪_𝑝[𝑟,𝑐]⋅𝒮_𝑔+𝑠_𝑔

      𝒪_𝑝[𝑟][𝑐]⋅𝒢⋅𝑎𝑝𝑝𝑒𝑛𝑑(𝑔)

   end for

     end for

  for 𝑟 in ℛ   do

      Metropolis-hastings:

20:  for  𝑐 in 𝒞   do

    if 1𝑇_𝑐×(𝒪_𝑝[𝑟][𝑐]⋅𝒮_𝑜−𝒪[𝑟][𝑐]⋅𝒮_𝑜)>

    𝑙𝑜𝑔(𝑟𝑎𝑛𝑑(0,1))   then

     𝒪[𝑟,𝑐]⋅𝒮_𝑜←𝒪_𝑝[𝑟][𝑐]⋅𝒮_𝑜

     𝑠𝑎𝑣𝑒({𝒪_𝑝[𝑟][𝑐]⋅𝒮_𝑔,𝒪_𝑝[𝑟,𝑐]⋅𝒢})

    end if

25:  end for

   Parallel tempering:

   for  𝑐 in 𝒞   do

    𝑑←𝒪[𝑟][𝑐]⋅𝒮_𝑜−𝒪[𝑟][𝑐+1]⋅𝒮_𝑜

    if  1𝑙𝑜𝑔(𝑟𝑎𝑛𝑑(0,1))<𝑑×(𝑇_𝑐−1𝑇_𝑐+1)   then

30:     𝑒𝑥𝑐ℎ𝑎𝑛𝑔𝑒(𝒪[𝑟][𝑐],𝒪[𝑟][𝑐+1])

     end if

    end for

   end for

  end for