Open SystemC Simulator with Support for Power Gating Design

<table class="table-group" id="tab3"><tr><td><table class="table"><tr><td class="thead-hr" colspan="4"><hr/></td></tr><tr class="thead"><td align="left">Number</td><td align="center">Simulator</td><td align="center">Design</td><td align="center">Time (s)</td></tr><tr><td class="thead-hr" colspan="4"><hr/></td></tr><tr><td align="left">4</td><td align="center">SC</td><td align="center">DV2.1</td><td align="center">466,403</td></tr><tr><td align="left">5</td><td align="center">SC-LP</td><td align="center">DV2.1</td><td align="center">503,315</td></tr><tr><td align="left">6</td><td align="center">SC-LP</td><td align="center">DV2.2</td><td align="center">496,851</td></tr><tr class="table-tr"><td colspan="4"><hr class="tbody-hr"/></td></tr></table></td></tr></table>

International Journal of Reconfigurable Computing

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Table 3

Table 3: Open SystemC Simulator with Support for Power Gating Design 