NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution

<table>Speedup gained by Runahead execution on 1- to 4-way superscalar processors. The lower parts of the bars show the IPC of the normal processors. The full bars show the IPC of the Runahead processor.</table>

International Journal of Reconfigurable Computing

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Figure 11

Figure 11: NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution 