Research Article

Frequency Optimization Objective during System Prototyping on Multi-FPGA Platform

Table 1

Comparison between routing results of WASGA and CERTIFY partitioning tools.

BenchmarksWASGACERTIFY
Cut signalsNB_FPGAR_hopMux_ratioCut signalsNB_FPGAR_hopMux_ratio

CPU20_occ10154560333166010
CPU20_occ2010024031634404
CPU30_occ2017104033076406
CPU30_occ3014874042521307
CPU50_occ30281940552794011
CPU50_occ5022024064019309
CPU125_occ5078096111NRNRNRNR
CPU125_occ6576445012NRNRNRNR